core/steering/dr_send.c

28 	struct dr_data_seg write;
488 				 &send_info->write, MLX5_OPCODE_RDMA_WRITE, false);
493 				 &send_info->write, MLX5_OPCODE_FLOW_TBL_ACCESS, true);
503  *     @size:      of data to write
573 		send_info->write.send_flags |= IB_SEND_SIGNALED;
575 		send_info->write.send_flags = 0;
584 	if (send_info->write.length > dmn->info.max_inline_size) {
590 		       (void *)(uintptr_t)send_info->write.addr,
591 		       send_info->write.length);
592 		send_info->write.addr = (uintptr_t)send_ring->mr->dma_addr + buff_offset;
593 		send_info->write.lkey = send_ring->mr->mkey;
601 		send_info->write.send_flags |= IB_SEND_SIGNALED;
604 	send_info->read.length = send_info->write.length;
683  * mlx5dr_send_postsend_ste: write size bytes into offset from the hw cm.
691  *              start write to this for write only part of the
703 	send_info.write.addr = (uintptr_t)data;
704 	send_info.write.length = size;
705 	send_info.write.lkey = 0;
762 		send_info.write.addr = (uintptr_t)data;
763 		send_info.write.length = byte_size;
764 		send_info.write.lkey = 0;
819 		send_info.write.addr = (uintptr_t)data;
820 		send_info.write.length = byte_size;
821 		send_info.write.lkey = 0;
841 	send_info.write.addr = (uintptr_t)action->rewrite->data;
842 	send_info.write.length = action->rewrite->num_of_actions *
844 	send_info.write.lkey = 0;
860 	send_info.write.addr = (uintptr_t)data;
861 	send_info.write.length = num_of_actions * DR_MODIFY_ACTION_SIZE;
886 		send_info.write.addr = addr;
888 		send_info.write.length = cur_sent;
889 		send_info.write.lkey = 0;
1350 	send_info.write.addr = (uintptr_t)data;
1351 	send_info.write.length = DR_STE_SIZE;
1352 	send_info.write.lkey = 0;
1353 	/* Using the sync_mr in order to write/read */