core/lib/pci_vsc.c

69 	int ret;
74 			ret = -EBUSY;
79 		ret = vsc_read(dev, VSC_SEMAPHORE_OFFSET, &lock_val);
80 		if (ret)
92 		ret = vsc_read(dev, VSC_COUNTER_OFFSET, &counter);
93 		if (ret)
96 		ret = vsc_write(dev, VSC_SEMAPHORE_OFFSET, counter);
97 		if (ret)
100 		ret = vsc_read(dev, VSC_SEMAPHORE_OFFSET, &lock_val);
101 		if (ret)
111 	return ret;
116 	int ret;
118 	ret = vsc_write(dev, VSC_SEMAPHORE_OFFSET, MLX5_VSC_UNLOCK);
120 	return ret;
126 	int ret;
136 	ret = vsc_read(dev, VSC_CTRL_OFFSET, &val);
137 	if (ret)
142 	ret = vsc_write(dev, VSC_CTRL_OFFSET, val);
143 	if (ret)
147 	ret = vsc_read(dev, VSC_CTRL_OFFSET, &val);
148 	if (ret)
157 		ret = vsc_read(dev, VSC_ADDR_OFFSET, &val);
158 		if (ret) {
168 	return ret;
175 	int ret;
181 		ret = vsc_read(dev, VSC_ADDR_OFFSET, &flag);
182 		if (ret)
183 			return ret;
198 	int ret;
206 	ret = vsc_write(dev, VSC_DATA_OFFSET, data);
207 	if (ret)
210 	ret = vsc_write(dev, VSC_ADDR_OFFSET, address);
211 	if (ret)
215 	ret = mlx5_vsc_wait_on_flag(dev, 0);
218 	return ret;
224 	int ret;
230 	ret = vsc_write(dev, VSC_ADDR_OFFSET, address);
231 	if (ret)
234 	ret = mlx5_vsc_wait_on_flag(dev, 1);
235 	if (ret)
238 	ret = vsc_read(dev, VSC_DATA_OFFSET, data);
240 	return ret;
248 	int ret;
250 	ret = mlx5_vsc_gw_read(dev, read_addr, data);
251 	if (ret)
254 	ret = vsc_read(dev, VSC_ADDR_OFFSET, next_read_addr);
255 	if (ret)
262 		ret = -EINVAL;
264 	return ret;
287 	int ret;
289 	ret = mlx5_vsc_gw_set_space(dev, MLX5_SEMAPHORE_SPACE_DOMAIN, NULL);
290 	if (ret) {
291 		mlx5_core_warn(dev, "Failed to set gw space %d\n", ret);
292 		return ret;
297 		ret = vsc_read(dev, VSC_COUNTER_OFFSET, &id);
298 		if (ret)
299 			return ret;
303 	ret = mlx5_vsc_gw_write(dev, space, id);
304 	if (ret)
305 		return ret;
308 	ret = mlx5_vsc_gw_read(dev, space, &data);
309 	if (ret)