Lines Matching defs:in
17 u32 in[MLX5E_TIR_CMD_IN_SZ_DW];
38 memset(builder->in, 0, sizeof(builder->in));
44 return MLX5_ADDR_OF(modify_tir_in, builder->in, ctx);
45 return MLX5_ADDR_OF(create_tir_in, builder->in, ctx);
80 MLX5_SET(modify_tir_in, builder->in, bitmask.packet_merge, 1);
117 MLX5_SET(modify_tir_in, builder->in, bitmask.hash, 1);
165 err = mlx5_core_create_tir(tir->mdev, builder->in, &tir->tirn);
186 /* Skip mutex if list_del is no-op (the TIR wasn't registered in the
188 * and READ_ONCE/WRITE_ONCE in list_empty/list_del guarantee consistency
202 return mlx5_core_modify_tir(tir->mdev, tir->tirn, builder->in);