Lines Matching refs:err
314 int err = -EDQUOT;
340 err = 0;
352 err = 0;
359 if (!err) {
375 return err;
757 int port, err = 0;
764 err = handle_counter(dev, qpc, slave, port);
765 if (err)
786 err = mlx4_update_qp(dev, qpn, MLX4_UPDATE_QP_VSD, ¶ms);
787 if (err)
844 return err;
896 int err = 0;
901 err = -ENONET;
910 err = -EBUSY;
915 err = -EPERM;
928 return err;
940 int err = -ENOENT;
950 err = 0;
954 return err;
1007 int err = 0;
1023 err = counter_alloc_res(dev, slave, RES_OP_RESERVE, 0, 0, &counter_idx,
1025 if (err == -ENOENT) {
1026 err = 0;
1027 } else if (err && err != -ENOSPC) {
1028 mlx4_err(dev, "%s: failed to create new counter for slave %d err %d\n",
1029 __func__, slave, err);
1034 err = 0;
1037 return err;
1239 int i = 0, err = 0;
1264 err = mlx4_get_counter_stats(dev, counters_arr[i], data,
1266 if (err) {
1282 int err;
1306 err = -EEXIST;
1309 err = res_tracker_insert(root, res_arr[i]);
1310 if (err)
1333 return err;
1469 int err;
1478 err = -ENOENT;
1482 err = -EPERM;
1485 err = remove_ok(r, type, extra);
1486 if (err)
1496 err = 0;
1501 return err;
1511 int err = 0;
1516 err = -ENOENT;
1518 err = -EPERM;
1524 err = -EBUSY;
1532 err = -EINVAL;
1542 err = -EINVAL;
1549 err = -EINVAL;
1552 err = -EINVAL;
1555 if (!err) {
1566 return err;
1575 int err = 0;
1580 err = -ENOENT;
1582 err = -EPERM;
1586 err = -EINVAL;
1591 err = -EINVAL;
1597 err = -EINVAL;
1602 err = -EINVAL;
1605 err = -EINVAL;
1608 if (!err) {
1619 return err;
1628 int err = 0;
1633 err = -ENOENT;
1635 err = -EPERM;
1639 err = -EINVAL;
1644 err = -EINVAL;
1649 err = -EINVAL;
1653 err = -EINVAL;
1656 if (!err) {
1665 if (!err && eq)
1668 return err;
1677 int err;
1682 err = -ENOENT;
1684 err = -EPERM;
1687 err = -EINVAL;
1689 err = -EBUSY;
1691 err = 0;
1693 err = -EINVAL;
1695 err = 0;
1698 if (!err) {
1708 return err;
1717 int err = 0;
1722 err = -ENOENT;
1724 err = -EPERM;
1727 err = -EINVAL;
1729 err = -EBUSY;
1731 err = -EINVAL;
1734 if (!err) {
1744 return err;
1789 int err;
1804 err = mlx4_grant_resource(dev, slave, RES_QP, count, 0);
1805 if (err)
1806 return err;
1808 err = __mlx4_qp_reserve_range(dev, count, align, &base, flags);
1809 if (err) {
1811 return err;
1814 err = add_res_range(dev, slave, base, count, RES_QP, 0);
1815 if (err) {
1818 return err;
1825 err = add_res_range(dev, slave, qpn, 1, RES_QP, 0);
1826 if (err)
1827 return err;
1830 err = qp_res_start_move_to(dev, slave, qpn, RES_QP_MAPPED,
1832 if (err)
1833 return err;
1836 err = __mlx4_qp_alloc_icm(dev, qpn);
1837 if (err) {
1839 return err;
1847 err = -EINVAL;
1850 return err;
1856 int err = -EINVAL;
1861 return err;
1865 err = mlx4_grant_resource(dev, slave, RES_MTT, 1 << order, 0);
1866 if (err)
1867 return err;
1875 err = add_res_range(dev, slave, base, 1, RES_MTT, order);
1876 if (err) {
1883 return err;
1889 int err = -EINVAL;
1896 err = mlx4_grant_resource(dev, slave, RES_MPT, 1, 0);
1897 if (err)
1907 err = add_res_range(dev, slave, id, 1, RES_MPT, index);
1908 if (err) {
1918 err = mr_res_start_move_to(dev, slave, id,
1920 if (err)
1921 return err;
1923 err = __mlx4_mpt_alloc_icm(dev, mpt->key);
1924 if (err) {
1926 return err;
1932 return err;
1939 int err;
1943 err = mlx4_grant_resource(dev, slave, RES_CQ, 1, 0);
1944 if (err)
1947 err = __mlx4_cq_alloc_icm(dev, &cqn);
1948 if (err) {
1953 err = add_res_range(dev, slave, cqn, 1, RES_CQ, 0);
1954 if (err) {
1964 err = -EINVAL;
1967 return err;
1974 int err;
1978 err = mlx4_grant_resource(dev, slave, RES_SRQ, 1, 0);
1979 if (err)
1982 err = __mlx4_srq_alloc_icm(dev, &srqn);
1983 if (err) {
1988 err = add_res_range(dev, slave, srqn, 1, RES_SRQ, 0);
1989 if (err) {
1999 err = -EINVAL;
2002 return err;
2098 int err = -EINVAL;
2104 return err;
2114 err = __mlx4_register_mac(dev, port, mac);
2115 if (err >= 0) {
2116 smac_index = err;
2117 set_param_l(out_param, err);
2118 err = 0;
2121 if (!err) {
2122 err = mac_add_to_slave(dev, slave, mac, port, smac_index);
2123 if (err)
2126 return err;
2209 int err;
2232 err = __mlx4_register_vlan(dev, port, vlan, &vlan_index);
2233 if (!err) {
2235 err = vlan_add_to_slave(dev, slave, vlan, port, vlan_index);
2236 if (err)
2239 return err;
2246 int err;
2251 err = mlx4_grant_resource(dev, slave, RES_COUNTER, 1, 0);
2252 if (err)
2253 return err;
2255 err = __mlx4_counter_alloc(dev, &index);
2256 if (err) {
2258 return err;
2261 err = add_res_range(dev, slave, index, 1, RES_COUNTER, port);
2262 if (err) {
2269 return err;
2276 int err;
2281 err = __mlx4_xrcd_alloc(dev, &xrcdn);
2282 if (err)
2283 return err;
2285 err = add_res_range(dev, slave, xrcdn, 1, RES_XRCD, 0);
2286 if (err)
2291 return err;
2300 int err;
2305 err = qp_alloc_res(dev, slave, vhcr->op_modifier, alop,
2310 err = mtt_alloc_res(dev, slave, vhcr->op_modifier, alop,
2315 err = mpt_alloc_res(dev, slave, vhcr->op_modifier, alop,
2320 err = cq_alloc_res(dev, slave, vhcr->op_modifier, alop,
2325 err = srq_alloc_res(dev, slave, vhcr->op_modifier, alop,
2330 err = mac_alloc_res(dev, slave, vhcr->op_modifier, alop,
2336 err = vlan_alloc_res(dev, slave, vhcr->op_modifier, alop,
2342 err = counter_alloc_res(dev, slave, vhcr->op_modifier, alop,
2347 err = xrcdn_alloc_res(dev, slave, vhcr->op_modifier, alop,
2352 err = -EINVAL;
2356 return err;
2362 int err;
2371 err = rem_res_range(dev, slave, base, count, RES_QP, 0);
2372 if (err)
2379 err = qp_res_start_move_to(dev, slave, qpn, RES_QP_RESERVED,
2381 if (err)
2382 return err;
2390 err = rem_res_range(dev, slave, qpn, 1, RES_QP, 0);
2393 err = -EINVAL;
2396 return err;
2402 int err = -EINVAL;
2407 return err;
2411 err = rem_res_range(dev, slave, base, 1, RES_MTT, order);
2412 if (!err) {
2416 return err;
2422 int err = -EINVAL;
2431 err = get_res(dev, slave, id, RES_MPT, &mpt);
2432 if (err)
2437 err = rem_res_range(dev, slave, id, 1, RES_MPT, 0);
2438 if (err)
2446 err = mr_res_start_move_to(dev, slave, id,
2448 if (err)
2449 return err;
2455 err = -EINVAL;
2458 return err;
2465 int err;
2470 err = rem_res_range(dev, slave, cqn, 1, RES_CQ, 0);
2471 if (err)
2479 err = -EINVAL;
2483 return err;
2490 int err;
2495 err = rem_res_range(dev, slave, srqn, 1, RES_SRQ, 0);
2496 if (err)
2504 err = -EINVAL;
2508 return err;
2515 int err = 0;
2529 err = -EINVAL;
2533 return err;
2542 int err = 0;
2559 err = -EINVAL;
2563 return err;
2570 int err;
2579 err = rem_res_range(dev, slave, index, 1, RES_COUNTER, 0);
2580 if (err)
2581 return err;
2586 return err;
2593 int err;
2599 err = rem_res_range(dev, slave, xrcdn, 1, RES_XRCD, 0);
2600 if (err)
2601 return err;
2605 return err;
2614 int err = -EINVAL;
2619 err = qp_free_res(dev, slave, vhcr->op_modifier, alop,
2624 err = mtt_free_res(dev, slave, vhcr->op_modifier, alop,
2629 err = mpt_free_res(dev, slave, vhcr->op_modifier, alop,
2634 err = cq_free_res(dev, slave, vhcr->op_modifier, alop,
2639 err = srq_free_res(dev, slave, vhcr->op_modifier, alop,
2644 err = mac_free_res(dev, slave, vhcr->op_modifier, alop,
2650 err = vlan_free_res(dev, slave, vhcr->op_modifier, alop,
2656 err = counter_free_res(dev, slave, vhcr->op_modifier, alop,
2661 err = xrcdn_free_res(dev, slave, vhcr->op_modifier, alop,
2668 return err;
2761 int err;
2772 err = mr_res_start_move_to(dev, slave, id, RES_MPT_HW, &mpt);
2773 if (err)
2774 return err;
2778 err = -EPERM;
2786 err = -EPERM;
2793 err = -EPERM;
2798 err = -EPERM;
2805 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
2806 if (err)
2809 err = check_mtt_range(dev, slave, mtt_base,
2811 if (err)
2817 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
2818 if (err)
2835 return err;
2844 int err;
2850 err = mr_res_start_move_to(dev, slave, id, RES_MPT_MAPPED, &mpt);
2851 if (err)
2852 return err;
2854 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
2855 if (err)
2867 return err;
2876 int err;
2882 err = get_res(dev, slave, id, RES_MPT, &mpt);
2883 if (err)
2884 return err;
2900 err = -EINVAL;
2906 err = 0;
2908 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
2910 err = -EBUSY;
2917 return err;
2958 int err;
2974 err = adjust_qp_sched_queue(dev, slave, qpc, inbox);
2975 if (err)
2976 return err;
2978 err = qp_res_start_move_to(dev, slave, qpn, RES_QP_HW, &qp, 0);
2979 if (err)
2980 return err;
2991 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
2992 if (err)
2995 err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt);
2996 if (err)
2999 err = get_res(dev, slave, rcqn, RES_CQ, &rcq);
3000 if (err)
3004 err = get_res(dev, slave, scqn, RES_CQ, &scq);
3005 if (err)
3011 err = get_res(dev, slave, srqn, RES_SRQ, &srq);
3012 if (err)
3018 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3019 if (err)
3058 return err;
3099 int err;
3108 err = add_res_range(dev, slave, res_id, 1, RES_EQ, 0);
3109 if (err)
3110 return err;
3111 err = eq_res_start_move_to(dev, slave, res_id, RES_EQ_HW, &eq);
3112 if (err)
3115 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
3116 if (err)
3119 err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt);
3120 if (err)
3123 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3124 if (err)
3139 return err;
3148 int err;
3154 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3156 return err;
3165 int err = -EINVAL;
3174 err = 0;
3180 return err;
3276 int err;
3278 err = get_containing_mtt(dev, slave, start, npages, &rmtt);
3279 if (err)
3280 return err;
3292 err = __mlx4_write_mtt(dev, &mtt, be64_to_cpu(page_list[0]), npages,
3298 return err;
3310 int err;
3312 err = eq_res_start_move_to(dev, slave, res_id, RES_EQ_RESERVED, &eq);
3313 if (err)
3314 return err;
3316 err = get_res(dev, slave, eq->mtt->com.res_id, RES_MTT, NULL);
3317 if (err)
3320 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3321 if (err)
3336 return err;
3345 int err;
3366 err = get_res(dev, slave, res_id, RES_EQ, &req);
3367 if (err)
3371 err = -EINVAL;
3377 err = PTR_ERR(mailbox);
3390 err = mlx4_cmd(dev, mailbox->dma, in_modifier, 0,
3397 return err;
3404 return err;
3416 int err;
3418 err = get_res(dev, slave, res_id, RES_EQ, &eq);
3419 if (err)
3420 return err;
3423 err = -EINVAL;
3427 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3431 return err;
3440 int err;
3447 err = cq_res_start_move_to(dev, slave, cqn, RES_CQ_HW, &cq);
3448 if (err)
3449 return err;
3450 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
3451 if (err)
3453 err = check_mtt_range(dev, slave, mtt_base, cq_get_mtt_size(cqc), mtt);
3454 if (err)
3456 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3457 if (err)
3469 return err;
3478 int err;
3482 err = cq_res_start_move_to(dev, slave, cqn, RES_CQ_ALLOCATED, &cq);
3483 if (err)
3484 return err;
3485 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3486 if (err)
3494 return err;
3505 int err;
3507 err = get_res(dev, slave, cqn, RES_CQ, &cq);
3508 if (err)
3509 return err;
3514 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3518 return err;
3528 int err;
3534 err = get_res(dev, slave, cq->mtt->com.res_id, RES_MTT, &orig_mtt);
3535 if (err)
3536 return err;
3539 err = -EINVAL;
3543 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
3544 if (err)
3547 err = check_mtt_range(dev, slave, mtt_base, cq_get_mtt_size(cqc), mtt);
3548 if (err)
3550 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3551 if (err)
3565 return err;
3577 int err;
3579 err = get_res(dev, slave, cqn, RES_CQ, &cq);
3580 if (err)
3581 return err;
3587 err = handle_resize(dev, slave, vhcr, inbox, outbox, cmd, cq);
3591 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3595 return err;
3616 int err;
3626 err = srq_res_start_move_to(dev, slave, srqn, RES_SRQ_HW, &srq);
3627 if (err)
3628 return err;
3629 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt);
3630 if (err)
3632 err = check_mtt_range(dev, slave, mtt_base, srq_get_mtt_size(srqc),
3634 if (err)
3637 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3638 if (err)
3652 return err;
3661 int err;
3665 err = srq_res_start_move_to(dev, slave, srqn, RES_SRQ_ALLOCATED, &srq);
3666 if (err)
3667 return err;
3668 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3669 if (err)
3681 return err;
3690 int err;
3694 err = get_res(dev, slave, srqn, RES_SRQ, &srq);
3695 if (err)
3696 return err;
3698 err = -EBUSY;
3701 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3704 return err;
3713 int err;
3717 err = get_res(dev, slave, srqn, RES_SRQ, &srq);
3718 if (err)
3719 return err;
3722 err = -EBUSY;
3726 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3729 return err;
3738 int err;
3742 err = get_res(dev, slave, qpn, RES_QP, &qp);
3743 if (err)
3744 return err;
3746 err = -EBUSY;
3750 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3753 return err;
3826 int err;
3837 err = adjust_qp_sched_queue(dev, slave, qpc, inbox);
3838 if (err)
3839 return err;
3840 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_INIT2RTR, slave);
3841 if (err)
3842 return err;
3852 err = get_res(dev, slave, qpn, RES_QP, &qp);
3853 if (err)
3854 return err;
3856 err = -EBUSY;
3860 err = update_vport_qp_param(dev, inbox, slave, qpn);
3861 if (err)
3864 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3870 if (!err) {
3879 return err;
3888 int err;
3891 err = adjust_qp_sched_queue(dev, slave, context, inbox);
3892 if (err)
3893 return err;
3894 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_RTR2RTS, slave);
3895 if (err)
3896 return err;
3910 int err;
3913 err = adjust_qp_sched_queue(dev, slave, context, inbox);
3914 if (err)
3915 return err;
3916 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_RTS2RTS, slave);
3917 if (err)
3918 return err;
3934 int err = adjust_qp_sched_queue(dev, slave, context, inbox);
3935 if (err)
3936 return err;
3947 int err;
3950 err = adjust_qp_sched_queue(dev, slave, context, inbox);
3951 if (err)
3952 return err;
3953 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_SQD2SQD, slave);
3954 if (err)
3955 return err;
3969 int err;
3972 err = adjust_qp_sched_queue(dev, slave, context, inbox);
3973 if (err)
3974 return err;
3975 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_SQD2RTS, slave);
3976 if (err)
3977 return err;
3991 int err;
3995 err = qp_res_start_move_to(dev, slave, qpn, RES_QP_MAPPED, &qp, 0);
3996 if (err)
3997 return err;
3998 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
3999 if (err)
4013 return err;
4033 int err;
4042 err = -EEXIST;
4049 err = 0;
4053 return err;
4061 int err;
4066 err = -EINVAL;
4071 err = 0;
4075 return err;
4147 int err;
4157 err = get_res(dev, slave, qpn, RES_QP, &rqp);
4158 if (err)
4159 return err;
4163 err = qp_attach(dev, slave, &qp, gid, block_loopback, prot,
4165 if (err) {
4169 err = add_mcg_res(dev, slave, rqp, gid, prot, type, reg_id);
4170 if (err)
4173 err = mlx4_adjust_port(dev, slave, gid, prot);
4174 if (err)
4177 err = rem_mcg_res(dev, slave, rqp, gid, prot, type, ®_id);
4178 if (err)
4181 err = qp_detach(dev, &qp, gid, prot, type, reg_id);
4182 if (err)
4187 return err;
4193 return err;
4290 int err;
4316 err = get_res(dev, slave, qpn, RES_QP, &rqp);
4317 if (err) {
4319 return err;
4326 err = mac_find_smac_ix_in_slave(dev, slave, port,
4329 if (err) {
4336 err = mlx4_cmd(dev, inbox->dma,
4340 if (err) {
4347 return err;
4376 int err;
4390 err = mlx4_slave_convert_port(dev, slave, ctrl->port);
4391 if (err <= 0)
4393 ctrl->port = err;
4395 err = get_res(dev, slave, qpn, RES_QP, &rqp);
4396 if (err) {
4398 return err;
4409 err = -EINVAL;
4420 err = -EINVAL;
4428 err = -EINVAL;
4432 err = mlx4_cmd_imm(dev, inbox->dma, &vhcr->out_param,
4436 if (err)
4440 err = add_res_range(dev, slave, vhcr->out_param, 1, RES_FS_RULE, qpn);
4441 if (err) {
4446 err = get_res(dev, slave, vhcr->out_param, RES_FS_RULE, &rrule);
4447 if (err)
4453 err = -ENOMEM;
4476 if (err)
4482 return err;
4487 int err;
4489 err = rem_res_range(dev, fs_rule->com.owner, fs_rule->com.res_id, 1, RES_FS_RULE, 0);
4490 if (err) {
4492 return err;
4506 int err;
4516 err = get_res(dev, slave, vhcr->in_param, RES_FS_RULE, &rrule);
4517 if (err)
4518 return err;
4531 err = get_res(dev, slave, qpn, RES_QP, &rqp);
4532 if (err)
4533 return err;
4536 err = get_res(dev, slave, mirr_reg_id, RES_FS_RULE, &rrule);
4537 if (err) {
4544 err = rem_res_range(dev, slave, vhcr->in_param, 1, RES_FS_RULE, 0);
4545 if (err) {
4550 err = mlx4_cmd(dev, vhcr->in_param, 0, 0,
4553 if (!err)
4557 return err;
4570 int err;
4573 err = get_res(dev, slave, index, RES_COUNTER, NULL);
4574 if (err)
4575 return err;
4577 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
4579 return err;
4671 int err;
4673 err = move_all_busy(dev, slave, RES_QP);
4674 if (err)
4708 err = mlx4_cmd(dev, in_param,
4713 if (err)
4744 int err;
4746 err = move_all_busy(dev, slave, RES_SRQ);
4747 if (err)
4774 err = mlx4_cmd(dev, in_param, srqn, 1,
4778 if (err)
4809 int err;
4811 err = move_all_busy(dev, slave, RES_CQ);
4812 if (err)
4839 err = mlx4_cmd(dev, in_param, cqn, 1,
4843 if (err)
4871 int err;
4873 err = move_all_busy(dev, slave, RES_MPT);
4874 if (err)
4906 err = mlx4_cmd(dev, in_param, mptn, 0,
4910 if (err)
4938 int err;
4940 err = move_all_busy(dev, slave, RES_MTT);
4941 if (err)
4980 int err;
4994 err = mlx4_cmd_imm(dev, mailbox->dma, ®_id, fs_rule->mirr_mbox_size >> 2, 0,
4999 if (err)
5000 goto err;
5002 err = add_res_range(dev, fs_rule->com.owner, reg_id, 1, RES_FS_RULE, fs_rule->qpn);
5003 if (err)
5006 err = get_res(dev, fs_rule->com.owner, reg_id, RES_FS_RULE, &mirr_rule);
5007 if (err)
5022 err:
5023 return err;
5034 int err = 0;
5046 err += mlx4_do_mirror_rule(dev, fs_rule);
5048 err += mlx4_undo_mirror_rule(dev, fs_rule);
5050 return err;
5074 int err;
5076 err = move_all_busy(dev, slave, RES_FS_RULE);
5077 if (err)
5091 err = mlx4_cmd(dev, base, 0, 0,
5124 int err;
5128 err = move_all_busy(dev, slave, RES_EQ);
5129 if (err)
5152 err = mlx4_cmd(dev, slave, eqn & 0x3ff,
5156 if (err)
5181 int err;
5185 err = move_all_busy(dev, slave, RES_COUNTER);
5186 if (err)
5227 int err;
5230 err = move_all_busy(dev, slave, RES_XRCD);
5231 if (err)
5304 int err;
5394 err = mlx4_cmd(dev, mailbox->dma,
5398 if (err) {
5400 work->slave, port, qp->local_qpn, err);