Lines Matching refs:MLX4_CMD_TIME_CLASS_A
198 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
230 MLX4_CMD_TIME_CLASS_A,
561 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
839 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1201 MLX4_CMD_TIME_CLASS_A,
1289 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1615 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1654 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1754 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1819 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2273 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2283 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2337 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2342 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
2371 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2382 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2398 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
2454 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2583 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2600 return mlx4_cmd(dev, 0, 0x1f, 0, MLX4_CMD_NOP, MLX4_CMD_TIME_CLASS_A,
2620 MLX4_CMD_DIAG_RPRT, MLX4_CMD_TIME_CLASS_A,
2660 MLX4_CMD_MOD_STAT_CFG, MLX4_CMD_TIME_CLASS_A,
2683 MLX4_CMD_MOD_STAT_CFG, MLX4_CMD_TIME_CLASS_A,
2693 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
2735 MLX4_CMD_GET_OP_REQ, MLX4_CMD_TIME_CLASS_A,
2785 1, MLX4_CMD_GET_OP_REQ, MLX4_CMD_TIME_CLASS_A,