ethernet/marvell/sky2.c

215 	sky2_write8(hw, B0_POWER_CTRL,
223 		sky2_write8(hw, B2_Y2_CLK_GATE,
228 		sky2_write8(hw, B2_Y2_CLK_GATE, 0);
264 		sky2_write8(hw, B2_Y2_CLK_GATE, 0);
267 		sky2_write8(hw, B2_Y2_CLK_GATE,
275 		sky2_write8(hw, B0_POWER_CTRL,
288 	sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
477 			sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
479 			sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
699 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
707 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
713 		sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
722 	sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
725 	sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
764 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
768 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
818 	sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
819 	sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
874 	sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
905 	sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
906 	sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
908 	sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
915 		sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
917 			sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
918 			sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
927 	sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
984 	sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
1009 	sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
1045 	sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
1068 		sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
1071 	sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
1330 	sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1687 		sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
2043 	sky2_write8(hw, SK_REG(port, TXA_CTRL),
2059 	sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
2071 	sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2084 	sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
2089 		sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
2091 	sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
2194 	sky2_write8(hw, SK_REG(port, LNK_LED_REG),
2219 	sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
2289 		sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
2291 		sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2351 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2353 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2424 	sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
2827 		sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2852 		sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
2857 		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2865 		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2872 		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2880 		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2906 		sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2911 		sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
3128 	sky2_write8(hw, B0_CTST, CS_RST_CLR);
3252 		sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
3256 	sky2_write8(hw, B0_CTST, CS_RST_SET);
3257 	sky2_write8(hw, B0_CTST, CS_RST_CLR);
3260 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
3267 	sky2_write8(hw, B0_CTST, CS_MRST_CLR);
3281 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
3284 		sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
3285 		sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
3323 		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
3344 		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
3354 	sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
3355 	sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
3361 	sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
3362 	sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
3366 		sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
3370 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
3372 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
3373 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
3374 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
3375 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
3376 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
3377 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
3378 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
3379 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
3380 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
3381 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
3382 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
3383 		sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
3404 	sky2_write8(hw, STAT_FIFO_WM, 16);
3408 		sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
3410 		sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
3419 	sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3420 	sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3421 	sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
4112 		sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
4116 		sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
4121 		sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
4125 		sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
4127 	sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
4130 		sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
4134 		sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
4136 	sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
4707 		sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4730 	sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
4741 		sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4995 	sky2_write8(hw, B0_CTST, CS_RST_SET);
5027 	sky2_write8(hw, B0_CTST, CS_RST_SET);