Lines Matching refs:block
28 struct rvu_block *block, int lf);
30 struct rvu_block *block, int lf);
95 /* Poll a RVU block's register 'offset', for a 'zero'
98 int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero)
105 reg = rvu->afreg_base + ((block << 28) | offset);
224 /* Get block LF's HW index from a PF_FUNC's block slot number */
225 int rvu_get_lf(struct rvu *rvu, struct rvu_block *block, u16 pcifunc, u16 slot)
231 for (lf = 0; lf < block->lf.max; lf++) {
232 if (block->fn_map[lf] == pcifunc) {
251 * return blkaddr of first encountered block.
342 struct rvu_block *block, u16 pcifunc,
349 if (lf >= block->lf.max) {
352 __func__, lf, block->name, block->lf.max);
365 block->fn_map[lf] = attach ? pcifunc : 0;
367 switch (block->addr) {
399 reg = is_pf ? block->pf_lfcnt_reg : block->vf_lfcnt_reg;
467 struct rvu_block *block;
472 block = &hw->block[blkaddr];
473 return block->implemented;
479 struct rvu_block *block;
483 /* For each block check if 'implemented' bit is set */
485 block = &hw->block[blkid];
488 block->implemented = true;
505 int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf)
509 if (!block->implemented)
512 rvu_write64(rvu, block->addr, block->lfreset_reg, lf | BIT_ULL(12));
513 err = rvu_poll_reg(rvu, block->addr, block->lfreset_reg, BIT_ULL(12),
520 struct rvu_block *block = &rvu->hw->block[blkaddr];
523 if (!block->implemented)
529 dev_err(rvu->dev, "HW block:%d reset timeout retrying again\n", blkaddr);
553 static void rvu_scan_block(struct rvu *rvu, struct rvu_block *block)
559 for (lf = 0; lf < block->lf.max; lf++) {
560 cfg = rvu_read64(rvu, block->addr,
561 block->lfcfg_reg | (lf << block->lfshift));
566 __set_bit(lf, block->lf.bmap);
570 rvu_update_rsrc_map(rvu, pfvf, block,
574 rvu_set_msix_offset(rvu, pfvf, block, lf);
633 /* Allocate memory for MSIX vector to RVU block LF mapping */
640 * AF, block AF and PF0_INT vectors, so jump to VFs.
726 struct rvu_block *block;
735 /* Free block LF bitmaps */
737 block = &hw->block[id];
738 kfree(block->lf.bmap);
847 struct rvu_block *block;
852 block = &hw->block[blkaddr];
853 if (!block->implemented)
857 block->lf.max = cfg & 0xFFF;
858 block->addr = blkaddr;
859 block->type = BLKTYPE_NIX;
860 block->lfshift = 8;
861 block->lookup_reg = NIX_AF_RVU_LF_CFG_DEBUG;
862 block->pf_lfcnt_reg = RVU_PRIV_PFX_NIXX_CFG(blkid);
863 block->vf_lfcnt_reg = RVU_PRIV_HWVFX_NIXX_CFG(blkid);
864 block->lfcfg_reg = NIX_PRIV_LFX_CFG;
865 block->msixcfg_reg = NIX_PRIV_LFX_INT_CFG;
866 block->lfreset_reg = NIX_AF_LF_RST;
867 block->rvu = rvu;
868 sprintf(block->name, "NIX%d", blkid);
870 return rvu_alloc_bitmap(&block->lf);
876 struct rvu_block *block;
881 block = &hw->block[blkaddr];
882 if (!block->implemented)
886 block->lf.max = cfg & 0xFF;
887 block->addr = blkaddr;
888 block->type = BLKTYPE_CPT;
889 block->multislot = true;
890 block->lfshift = 3;
891 block->lookup_reg = CPT_AF_RVU_LF_CFG_DEBUG;
892 block->pf_lfcnt_reg = RVU_PRIV_PFX_CPTX_CFG(blkid);
893 block->vf_lfcnt_reg = RVU_PRIV_HWVFX_CPTX_CFG(blkid);
894 block->lfcfg_reg = CPT_PRIV_LFX_CFG;
895 block->msixcfg_reg = CPT_PRIV_LFX_INT_CFG;
896 block->lfreset_reg = CPT_AF_LF_RST;
897 block->rvu = rvu;
898 sprintf(block->name, "CPT%d", blkid);
899 return rvu_alloc_bitmap(&block->lf);
930 struct rvu_block *block;
944 block = &hw->block[BLKADDR_NPA];
945 if (!block->implemented)
948 block->lf.max = (cfg >> 16) & 0xFFF;
949 block->addr = BLKADDR_NPA;
950 block->type = BLKTYPE_NPA;
951 block->lfshift = 8;
952 block->lookup_reg = NPA_AF_RVU_LF_CFG_DEBUG;
953 block->pf_lfcnt_reg = RVU_PRIV_PFX_NPA_CFG;
954 block->vf_lfcnt_reg = RVU_PRIV_HWVFX_NPA_CFG;
955 block->lfcfg_reg = NPA_PRIV_LFX_CFG;
956 block->msixcfg_reg = NPA_PRIV_LFX_INT_CFG;
957 block->lfreset_reg = NPA_AF_LF_RST;
958 block->rvu = rvu;
959 sprintf(block->name, "NPA");
960 err = rvu_alloc_bitmap(&block->lf);
983 block = &hw->block[BLKADDR_SSO];
984 if (!block->implemented)
987 block->lf.max = cfg & 0xFFFF;
988 block->addr = BLKADDR_SSO;
989 block->type = BLKTYPE_SSO;
990 block->multislot = true;
991 block->lfshift = 3;
992 block->lookup_reg = SSO_AF_RVU_LF_CFG_DEBUG;
993 block->pf_lfcnt_reg = RVU_PRIV_PFX_SSO_CFG;
994 block->vf_lfcnt_reg = RVU_PRIV_HWVFX_SSO_CFG;
995 block->lfcfg_reg = SSO_PRIV_LFX_HWGRP_CFG;
996 block->msixcfg_reg = SSO_PRIV_LFX_HWGRP_INT_CFG;
997 block->lfreset_reg = SSO_AF_LF_HWGRP_RST;
998 block->rvu = rvu;
999 sprintf(block->name, "SSO GROUP");
1000 err = rvu_alloc_bitmap(&block->lf);
1009 block = &hw->block[BLKADDR_SSOW];
1010 if (!block->implemented)
1012 block->lf.max = (cfg >> 56) & 0xFF;
1013 block->addr = BLKADDR_SSOW;
1014 block->type = BLKTYPE_SSOW;
1015 block->multislot = true;
1016 block->lfshift = 3;
1017 block->lookup_reg = SSOW_AF_RVU_LF_HWS_CFG_DEBUG;
1018 block->pf_lfcnt_reg = RVU_PRIV_PFX_SSOW_CFG;
1019 block->vf_lfcnt_reg = RVU_PRIV_HWVFX_SSOW_CFG;
1020 block->lfcfg_reg = SSOW_PRIV_LFX_HWS_CFG;
1021 block->msixcfg_reg = SSOW_PRIV_LFX_HWS_INT_CFG;
1022 block->lfreset_reg = SSOW_AF_LF_HWS_RST;
1023 block->rvu = rvu;
1024 sprintf(block->name, "SSOWS");
1025 err = rvu_alloc_bitmap(&block->lf);
1034 block = &hw->block[BLKADDR_TIM];
1035 if (!block->implemented)
1038 block->lf.max = cfg & 0xFFFF;
1039 block->addr = BLKADDR_TIM;
1040 block->type = BLKTYPE_TIM;
1041 block->multislot = true;
1042 block->lfshift = 3;
1043 block->lookup_reg = TIM_AF_RVU_LF_CFG_DEBUG;
1044 block->pf_lfcnt_reg = RVU_PRIV_PFX_TIM_CFG;
1045 block->vf_lfcnt_reg = RVU_PRIV_HWVFX_TIM_CFG;
1046 block->lfcfg_reg = TIM_PRIV_LFX_CFG;
1047 block->msixcfg_reg = TIM_PRIV_LFX_INT_CFG;
1048 block->lfreset_reg = TIM_AF_LF_RST;
1049 block->rvu = rvu;
1050 sprintf(block->name, "TIM");
1051 err = rvu_alloc_bitmap(&block->lf);
1101 block = &hw->block[blkid];
1102 if (!block->lf.bmap)
1105 /* Allocate memory for block LF/slot to pcifunc mapping info */
1106 block->fn_map = devm_kcalloc(rvu->dev, block->lf.max,
1108 if (!block->fn_map) {
1116 rvu_scan_block(rvu, block);
1246 /* Get current count of a RVU block's LF/slots
1271 /* Return true if LFs of block type are attached to pcifunc */
1308 static int rvu_lookup_rsrc(struct rvu *rvu, struct rvu_block *block,
1314 rvu_write64(rvu, block->addr, block->lookup_reg, val);
1317 while (rvu_read64(rvu, block->addr, block->lookup_reg) & (1ULL << 13))
1320 val = rvu_read64(rvu, block->addr, block->lookup_reg);
1335 struct rvu_block *block;
1342 /* Get all the block addresses from which LFs are attached to
1346 block = &rvu->hw->block[blkaddr];
1347 if (block->type != blktype)
1364 * correct block address out of all attached block
1365 * addresses and slot number in that block.
1387 struct rvu_block *block;
1398 block = &hw->block[blkaddr];
1400 num_lfs = rvu_get_rsrc_mapcount(pfvf, block->addr);
1405 lf = rvu_lookup_rsrc(rvu, block, pcifunc, slot);
1410 rvu_write64(rvu, blkaddr, block->lfcfg_reg |
1411 (lf << block->lfshift), 0x00ULL);
1414 rvu_update_rsrc_map(rvu, pfvf, block,
1418 rvu_free_rsrc(&block->lf, lf);
1421 rvu_clear_msix_offset(rvu, pfvf, block, lf);
1430 struct rvu_block *block;
1439 /* Check for RVU block's LFs attached to this func,
1443 block = &hw->block[blkid];
1444 if (!block->lf.bmap)
1464 rvu_detach_block(rvu, pcifunc, block->type);
1486 /* All CGX mapped PFs are set with assigned NIX block during init */
1553 struct rvu_block *block;
1565 block = &hw->block[blkaddr];
1566 if (!block->lf.bmap)
1571 lf = rvu_alloc_rsrc(&block->lf);
1576 rvu_write64(rvu, blkaddr, block->lfcfg_reg |
1577 (lf << block->lfshift), cfg);
1578 rvu_update_rsrc_map(rvu, pfvf, block,
1582 rvu_set_msix_offset(rvu, pfvf, block, lf);
1592 struct rvu_block *block;
1596 block = &hw->block[BLKADDR_NPA];
1597 free_lfs = rvu_rsrc_free_count(&block->lf);
1613 block = &hw->block[blkaddr];
1614 free_lfs = rvu_rsrc_free_count(&block->lf);
1625 block = &hw->block[BLKADDR_SSO];
1627 if (req->sso > block->lf.max) {
1630 pcifunc, req->sso, block->lf.max);
1633 mappedlfs = rvu_get_rsrc_mapcount(pfvf, block->addr);
1634 free_lfs = rvu_rsrc_free_count(&block->lf);
1642 block = &hw->block[BLKADDR_SSOW];
1643 if (req->ssow > block->lf.max) {
1646 pcifunc, req->sso, block->lf.max);
1649 mappedlfs = rvu_get_rsrc_mapcount(pfvf, block->addr);
1650 free_lfs = rvu_rsrc_free_count(&block->lf);
1657 block = &hw->block[BLKADDR_TIM];
1658 if (req->timlfs > block->lf.max) {
1661 pcifunc, req->timlfs, block->lf.max);
1664 mappedlfs = rvu_get_rsrc_mapcount(pfvf, block->addr);
1665 free_lfs = rvu_rsrc_free_count(&block->lf);
1676 block = &hw->block[blkaddr];
1677 if (req->cptlfs > block->lf.max) {
1680 pcifunc, req->cptlfs, block->lf.max);
1683 mappedlfs = rvu_get_rsrc_mapcount(pfvf, block->addr);
1684 free_lfs = rvu_rsrc_free_count(&block->lf);
1693 dev_info(rvu->dev, "Request for %s failed\n", block->name);
1709 /* Requester already has LFs from given block ? */
1793 struct rvu_block *block, int lf)
1798 cfg = rvu_read64(rvu, block->addr, block->msixcfg_reg |
1799 (lf << block->lfshift));
1809 rvu_write64(rvu, block->addr, block->msixcfg_reg |
1810 (lf << block->lfshift), (cfg & ~0x7FFULL) | offset);
1814 pfvf->msix_lfmap[offset + vec] = MSIX_BLKLF(block->addr, lf);
1818 struct rvu_block *block, int lf)
1823 cfg = rvu_read64(rvu, block->addr, block->msixcfg_reg |
1824 (lf << block->lfshift));
1828 rvu_write64(rvu, block->addr, block->msixcfg_reg |
1829 (lf << block->lfshift), cfg & ~0x7FFULL);
1831 offset = rvu_get_msix_offset(rvu, pfvf, block->addr, lf);
1853 /* Set MSIX offsets for each block's LFs attached to this PF/VF */
1854 lf = rvu_get_lf(rvu, &hw->block[BLKADDR_NPA], pcifunc, 0);
1862 lf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
1868 lf = rvu_get_lf(rvu, &hw->block[BLKADDR_SSO], pcifunc, slot);
1875 lf = rvu_get_lf(rvu, &hw->block[BLKADDR_SSOW], pcifunc, slot);
1882 lf = rvu_get_lf(rvu, &hw->block[BLKADDR_TIM], pcifunc, slot);
1889 lf = rvu_get_lf(rvu, &hw->block[BLKADDR_CPT0], pcifunc, slot);
1896 lf = rvu_get_lf(rvu, &hw->block[BLKADDR_CPT1], pcifunc, slot);
1908 struct rvu_block *block;
1914 block = &hw->block[BLKADDR_NPA];
1915 rsp->npa = rvu_rsrc_free_count(&block->lf);
1917 block = &hw->block[BLKADDR_NIX0];
1918 rsp->nix = rvu_rsrc_free_count(&block->lf);
1920 block = &hw->block[BLKADDR_NIX1];
1921 rsp->nix1 = rvu_rsrc_free_count(&block->lf);
1923 block = &hw->block[BLKADDR_SSO];
1924 rsp->sso = rvu_rsrc_free_count(&block->lf);
1926 block = &hw->block[BLKADDR_SSOW];
1927 rsp->ssow = rvu_rsrc_free_count(&block->lf);
1929 block = &hw->block[BLKADDR_TIM];
1930 rsp->tim = rvu_rsrc_free_count(&block->lf);
1932 block = &hw->block[BLKADDR_CPT0];
1933 rsp->cpt = rvu_rsrc_free_count(&block->lf);
1935 block = &hw->block[BLKADDR_CPT1];
1936 rsp->cpt1 = rvu_rsrc_free_count(&block->lf);
2055 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr],
2598 struct rvu_block *block;
2602 block = &rvu->hw->block[blkaddr];
2604 block->addr);
2608 lf = rvu_get_lf(rvu, block, pcifunc, slot);
2613 if (block->addr == BLKADDR_NIX0 || block->addr == BLKADDR_NIX1)
2614 rvu_nix_lf_teardown(rvu, pcifunc, block->addr, lf);
2615 else if (block->addr == BLKADDR_NPA)
2617 else if ((block->addr == BLKADDR_CPT0) ||
2618 (block->addr == BLKADDR_CPT1))
2619 rvu_cpt_lf_teardown(rvu, pcifunc, block->addr, lf,
2622 err = rvu_lf_reset(rvu, block, lf);
2625 block->addr, lf);
2636 /* Reset order should reflect inter-block dependencies: