octeontx2/af/ptp.c

134 		writeq(500000000, ptp->reg_base + PTP_PPS_THRESH_HI);
258 	writeq(timestamp, ptp->reg_base + PTP_NANO_TIMESTAMP);
259 	writeq(0, ptp->reg_base + PTP_FRNS_TIMESTAMP);
260 	writeq(timestamp / NSEC_PER_SEC,
265 	writeq(nxt_rollover_set, ptp->reg_base + PTP_NXT_ROLLOVER_SET);
266 	writeq(curr_rollover_set, ptp->reg_base + PTP_CURR_ROLLOVER_SET);
272 	writeq(regval, ptp->reg_base + PTP_CLOCK_CFG);
301 		writeq(delta, ptp->reg_base + PTP_NANO_TIMESTAMP);
302 		writeq(0, ptp->reg_base + PTP_FRNS_TIMESTAMP);
308 		writeq(regval, ptp->reg_base + PTP_CLOCK_CFG);
354 	writeq(comp, ptp->reg_base + PTP_CLOCK_COMP);
389 		writeq(0, ptp->reg_base + PTP_NANO_TIMESTAMP);
390 		writeq(0, ptp->reg_base + PTP_FRNS_TIMESTAMP);
391 		writeq(0, ptp->reg_base + PTP_SEC_TIMESTAMP);
392 		writeq(0, ptp->reg_base + PTP_CURR_ROLLOVER_SET);
393 		writeq(0x3b9aca00, ptp->reg_base + PTP_NXT_ROLLOVER_SET);
394 		writeq(0x3b9aca00, ptp->reg_base + PTP_SEC_ROLLOVER);
415 	writeq(clock_cfg, ptp->reg_base + PTP_CLOCK_CFG);
419 	writeq(clock_cfg, ptp->reg_base + PTP_CLOCK_CFG);
427 	writeq(clock_comp, ptp->reg_base + PTP_CLOCK_COMP);
447 		writeq(thresh, ptp->reg_base + PTP_PPS_THRESH_HI);
484 		writeq(clock_cfg, ptp->reg_base + PTP_CLOCK_CFG);
486 		writeq(0, ptp->reg_base + PTP_PPS_THRESH_HI);
487 		writeq(0, ptp->reg_base + PTP_PPS_THRESH_LO);
491 		writeq(((u64)period << 32), ptp->reg_base + PTP_PPS_HI_INCR);
492 		writeq(((u64)period << 32), ptp->reg_base + PTP_PPS_LO_INCR);
495 		writeq(clock_cfg, ptp->reg_base + PTP_CLOCK_CFG);
507 		writeq((0x1dcd6500ULL - ptp->clock_period) << 32,
586 	writeq(clock_cfg, ptp->reg_base + PTP_CLOCK_CFG);