Lines Matching refs:val
41 u64 reg, val;
44 val = (0x8100ull & 0xFFFF) | BIT_ULL(20) | BIT_ULL(22);
47 mcs_reg_write(mcs, reg, val);
50 mcs_reg_write(mcs, reg, val);
53 val = (0x88a8ull & 0xFFFF) | BIT_ULL(20) | BIT_ULL(23);
57 mcs_reg_write(mcs, reg, val);
61 mcs_reg_write(mcs, reg, val);
64 val = BIT_ULL(0) | BIT_ULL(1) | BIT_ULL(12);
67 mcs_reg_write(mcs, reg, val);
70 mcs_reg_write(mcs, reg, val);
75 u64 reg, val;
77 val = (map->secy & 0x3F) | (map->ctrl_pkt & 0x1) << 6;
83 val |= (map->sc & 0x3F) << 7;
87 mcs_reg_write(mcs, reg, val);
92 u64 reg, val;
94 val = (map->sa_index0 & 0x7F) | (map->sa_index1 & 0x7F) << 7;
97 mcs_reg_write(mcs, reg, val);
100 val = mcs_reg_read(mcs, reg);
103 val |= BIT_ULL(map->sc_id);
105 val &= ~BIT_ULL(map->sc_id);
107 mcs_reg_write(mcs, reg, val);
117 u64 val, reg;
119 val = (map->sa_index & 0x7F) | (map->sa_in_use << 7);
122 mcs_reg_write(mcs, reg, val);
128 u64 val;
130 val = mcs_reg_read(mcs, MCSX_MIL_GLOBAL);
133 val |= BIT_ULL(4);
134 mcs_reg_write(mcs, MCSX_MIL_GLOBAL, val);
144 val &= ~BIT_ULL(4);
145 mcs_reg_write(mcs, MCSX_MIL_GLOBAL, val);
161 u64 val, sa_status;
181 val = mcs_reg_read(mcs, MCSX_CPM_TX_SLAVE_SA_MAP_MEM_0X(sc));
183 event.sa_id = val & 0x7F;
185 event.sa_id = (val >> 7) & 0x7F;
196 u64 val;
205 val = mcs_reg_read(mcs, MCSX_CPM_TX_SLAVE_SA_MAP_MEM_0X(sc));
209 event.sa_id = (val >> 7) & 0x7F;
212 event.sa_id = val & 0x7F;