octeontx2/af/cgx.c

115 void cgx_write(struct cgx *cgx, u64 lmac, u64 offset, u64 val)
178 	cgx_write(cgx_dev, lmac_id, offset, val);
252 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)),
258 	cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);
316 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), cfg);
329 	cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);
354 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), 0);
360 	cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);
398 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), cfg);
440 		cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);
443 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), 0);
485 	cgx_write(cgx, lmac_id, cgx->mac_ops->rxid_map_offset, (pkind & 0x3F));
542 		cgx_write(cgx, lmac_id, CGXX_GMP_PCS_MRX_CTL, cfg);
549 		cgx_write(cgx, lmac_id, CGXX_SPUX_CONTROL1, cfg);
576 		cgx_write(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);
583 			cgx_write(cgx, 0,
590 		cgx_write(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);
597 				cgx_write(cgx, 0,
653 			cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
657 			cgx_write(cgx, lmac_id,	CGXX_SMUX_RX_FRM_CTL, cfg);
661 			cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg);
668 			cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
672 			cgx_write(cgx, lmac_id,	CGXX_SMUX_RX_FRM_CTL, cfg);
676 			cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg);
717 			cgx_write(cgx, 0,
720 			cgx_write(cgx, lmac_id,
725 		cgx_write(cgx, lmac_id, CGXX_CMRX_TX_STAT0 + (stat_id * 8), 0);
801 	cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg);
821 		cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg);
840 	cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
845 	cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);
850 	cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg);
859 	cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg);
873 		cgx_write(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_TIME,
877 		cgx_write(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_INTERVAL,
880 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_TX_PAUSE_PKT_TIME,
886 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_TX_PAUSE_PKT_INTERVAL,
893 	cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);
897 	cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
902 	cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg);
907 	cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg);
912 	cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg);
985 	cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg);
989 	cgx_write(cgx, lmac_id, CGXX_SMUX_SMAC, cfg);
1023 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
1027 		cgx_write(cgx, lmac_id,	CGXX_SMUX_RX_FRM_CTL, cfg);
1032 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
1036 		cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);
1067 	cgx_write(cgx, lmac->lmac_id, CGX_COMMAND_REG, req);
1384 	cgx_write(lmac->cgx, lmac->lmac_id, CGX_EVENT_REG, 0);
1385 	cgx_write(lmac->cgx, lmac->lmac_id, offset, clear_bit);
1593 	cgx_write(cgxd, lmac_id, CGXX_CMRX_RX_LOGL_XON, cfg);
1623 	cgx_write(cgx, lmac->lmac_id, offset, ena_bit);