marvell/mvpp2/mvpp2_main.c

387 				struct mvpp2_bm_pool *bm_pool, int size)
401 		bm_pool->size_bytes = 2 * sizeof(u32) * size;
403 		bm_pool->size_bytes = 2 * sizeof(u64) * size;
405 	bm_pool->virt_addr = dma_alloc_coherent(dev, bm_pool->size_bytes,
406 						&bm_pool->dma_addr,
408 	if (!bm_pool->virt_addr)
411 	if (!IS_ALIGNED((unsigned long)bm_pool->virt_addr,
413 		dma_free_coherent(dev, bm_pool->size_bytes,
414 				  bm_pool->virt_addr, bm_pool->dma_addr);
416 			bm_pool->id, MVPP2_BM_POOL_PTR_ALIGN);
420 	mvpp2_write(priv, MVPP2_BM_POOL_BASE_REG(bm_pool->id),
421 		    lower_32_bits(bm_pool->dma_addr));
422 	mvpp2_write(priv, MVPP2_BM_POOL_SIZE_REG(bm_pool->id), size);
424 	val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id));
439 	mvpp2_write(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id), val);
441 	bm_pool->size = size;
442 	bm_pool->pkt_size = 0;
443 	bm_pool->buf_num = 0;
450 				      struct mvpp2_bm_pool *bm_pool,
455 	bm_pool->buf_size = buf_size;
458 	mvpp2_write(priv, MVPP2_POOL_BUF_SIZE_REG(bm_pool->id), val);
462 				    struct mvpp2_bm_pool *bm_pool,
469 				      MVPP2_BM_PHY_ALLOC_REG(bm_pool->id));
493 			       struct mvpp2_bm_pool *bm_pool, int buf_num)
498 	if (buf_num > bm_pool->buf_num) {
500 		     bm_pool->id, buf_num);
501 		buf_num = bm_pool->buf_num;
505 		pp = priv->page_pool[bm_pool->id];
512 		mvpp2_bm_bufs_get_addrs(dev, priv, bm_pool,
517 					 bm_pool->buf_size, DMA_FROM_DEVICE);
523 		mvpp2_frag_free(bm_pool, pp, data);
527 	bm_pool->buf_num -= i;
531 static int mvpp2_check_hw_buf_num(struct mvpp2 *priv, struct mvpp2_bm_pool *bm_pool)
535 	buf_num += mvpp2_read(priv, MVPP2_BM_POOL_PTRS_NUM_REG(bm_pool->id)) &
537 	buf_num += mvpp2_read(priv, MVPP2_BM_BPPI_PTRS_NUM_REG(bm_pool->id)) &
549 				 struct mvpp2_bm_pool *bm_pool)
554 	buf_num = mvpp2_check_hw_buf_num(priv, bm_pool);
555 	mvpp2_bm_bufs_free(dev, priv, bm_pool, buf_num);
558 	buf_num = mvpp2_check_hw_buf_num(priv, bm_pool);
561 		     bm_pool->id, bm_pool->buf_num);
565 	val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id));
567 	mvpp2_write(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id), val);
570 		page_pool_destroy(priv->page_pool[bm_pool->id]);
571 		priv->page_pool[bm_pool->id] = NULL;
574 	dma_free_coherent(dev, bm_pool->size_bytes,
575 			  bm_pool->virt_addr,
576 			  bm_pool->dma_addr);
583 	struct mvpp2_bm_pool *bm_pool;
591 		bm_pool = &priv->bm_pools[i];
592 		bm_pool->id = i;
593 		err = mvpp2_bm_pool_create(dev, priv, bm_pool, size);
596 		mvpp2_bm_pool_bufsize_set(priv, bm_pool, 0);
762 			     struct mvpp2_bm_pool *bm_pool,
772 	data = mvpp2_frag_alloc(bm_pool, page_pool);
782 					  MVPP2_RX_BUF_SIZE(bm_pool->pkt_size),
785 			mvpp2_frag_free(bm_pool, NULL, data);
1044 			     struct mvpp2_bm_pool *bm_pool, int buf_num)
1053 	    bm_pool->pkt_size > MVPP2_BM_LONG_PKT_SIZE) {
1059 	buf_size = MVPP2_RX_BUF_SIZE(bm_pool->pkt_size);
1063 	    (buf_num + bm_pool->buf_num > bm_pool->size)) {
1066 			   buf_num, bm_pool->id);
1071 		pp = port->priv->page_pool[bm_pool->id];
1073 		buf = mvpp2_buf_alloc(port, bm_pool, pp, &dma_addr,
1078 		mvpp2_bm_pool_put(port, bm_pool->id, dma_addr,
1083 	bm_pool->buf_num += i;
1087 		   bm_pool->id, bm_pool->pkt_size, buf_size, total_size);
1091 		   bm_pool->id, i, buf_num);
1253 	struct mvpp2_bm_pool *bm_pool;
1257 		bm_pool = mvpp2_bm_pool_use_percpu(port, MVPP2_BM_SHORT, i,
1259 		if (!bm_pool)
1262 		bm_pool->port_map |= BIT(port->id);
1263 		mvpp2_rxq_short_pool_set(port, i, bm_pool->id);
1267 		bm_pool = mvpp2_bm_pool_use_percpu(port, MVPP2_BM_LONG, i + port->nrxqs,
1269 		if (!bm_pool)
1272 		bm_pool->port_map |= BIT(port->id);
1273 		mvpp2_rxq_long_pool_set(port, i, bm_pool->id);
3603 			   struct mvpp2_bm_pool *bm_pool,
3610 	buf = mvpp2_buf_alloc(port, bm_pool, page_pool,
3931 		struct mvpp2_bm_pool *bm_pool;
3955 		bm_pool = &port->priv->bm_pools[pool];
3983 		if (bm_pool->frag_size > PAGE_SIZE)
3986 			frag_size = bm_pool->frag_size;
3991 			if (bm_pool->pkt_size == MVPP2_BM_SHORT_PKT_SIZE)
4005 				err = mvpp2_rx_refill(port, bm_pool, pp, pool);
4032 		err = mvpp2_rx_refill(port, bm_pool, pp, pool);
4043 					       bm_pool->buf_size, DMA_FROM_DEVICE,
7696 		struct mvpp2_bm_pool *bm_pool = &priv->bm_pools[i];
7698 		mvpp2_bm_pool_destroy(&pdev->dev, priv, bm_pool);