ethernet/marvell/mvneta.c

539 	struct mvneta_bm *bm_priv;
1134 	err = mvebu_mbus_get_io_win_info(pp->bm_priv->bppi_phys_addr, &wsize,
1142 	err = mvneta_mbus_io_win_set(pp, pp->bm_priv->bppi_phys_addr, wsize,
1174 	pp->pool_long = mvneta_bm_pool_use(pp->bm_priv, long_pool_id,
1192 	pp->pool_short = mvneta_bm_pool_use(pp->bm_priv, short_pool_id,
1197 		mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id);
1218 	mvneta_bm_bufs_free(pp->bm_priv, bm_pool, 1 << pp->id);
1242 	mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id);
1243 	mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, 1 << pp->id);
1245 	pp->bm_priv = NULL;
1539 	if (pp->bm_priv)
1547 	if (pp->bm_priv)
1548 		mvreg_write(pp, MVNETA_BM_ADDRESS, pp->bm_priv->bppi_phys_addr);
1995 	if (pp->bm_priv) {
2002 			bm_pool = &pp->bm_priv->bm_pools[pool_id];
2004 			mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool,
2572 		bm_pool = &pp->bm_priv->bm_pools[pool_id];
2578 			mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool,
2592 			dma_sync_single_range_for_cpu(&pp->bm_priv->pdev->dev,
2608 			mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool,
2637 		dma_unmap_single(&pp->bm_priv->pdev->dev, phys_addr,
3313 		if (pp->bm_priv)
3468 	if (!pp->bm_priv) {
3867 		if (pp->bm_priv)
3883 	if (pp->bm_priv)
4614 	if (pp->bm_priv) {
4801 		if (!pp->bm_priv) {
4941 	if (!pp->bm_priv)
4951 		if (!pp->bm_priv)
5640 		pp->bm_priv = mvneta_bm_get(bm_node);
5641 		if (pp->bm_priv) {
5646 				mvneta_bm_put(pp->bm_priv);
5647 				pp->bm_priv = NULL;
5661 	if (!pp->bm_priv)
5693 	if (!pp->bm_priv)
5721 	if (pp->bm_priv) {
5722 		mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id);
5723 		mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short,
5725 		mvneta_bm_put(pp->bm_priv);
5755 	if (pp->bm_priv) {
5756 		mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id);
5757 		mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short,
5759 		mvneta_bm_put(pp->bm_priv);
5820 	if (pp->bm_priv) {
5825 			pp->bm_priv = NULL;