net/ethernet/lantiq_xrx200.c

130 static void xrx200_flush_dma(struct xrx200_chan *ch)
135 		struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
141 			    ch->priv->rx_buf_size;
142 		ch->dma.desc++;
143 		ch->dma.desc %= LTQ_DESC_NUM;
187 static int xrx200_alloc_buf(struct xrx200_chan *ch, void *(*alloc)(unsigned int size))
189 	void *buf = ch->rx_buff[ch->dma.desc];
190 	struct xrx200_priv *priv = ch->priv;
194 	ch->rx_buff[ch->dma.desc] = alloc(priv->rx_skb_size);
195 	if (!ch->rx_buff[ch->dma.desc]) {
196 		ch->rx_buff[ch->dma.desc] = buf;
201 	mapping = dma_map_single(priv->dev, ch->rx_buff[ch->dma.desc],
204 		skb_free_frag(ch->rx_buff[ch->dma.desc]);
205 		ch->rx_buff[ch->dma.desc] = buf;
210 	ch->dma.desc_base[ch->dma.desc].addr = mapping + NET_SKB_PAD + NET_IP_ALIGN;
214 	ch->dma.desc_base[ch->dma.desc].ctl =
220 static int xrx200_hw_receive(struct xrx200_chan *ch)
222 	struct xrx200_priv *priv = ch->priv;
223 	struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
224 	void *buf = ch->rx_buff[ch->dma.desc];
231 	ret = xrx200_alloc_buf(ch, napi_alloc_frag);
233 	ch->dma.desc++;
234 	ch->dma.desc %= LTQ_DESC_NUM;
254 		ch->skb_head = skb;
255 		ch->skb_tail = skb;
257 	} else if (ch->skb_head) {
258 		if (ch->skb_head == ch->skb_tail)
259 			skb_shinfo(ch->skb_tail)->frag_list = skb;
261 			ch->skb_tail->next = skb;
262 		ch->skb_tail = skb;
263 		ch->skb_head->len += skb->len;
264 		ch->skb_head->data_len += skb->len;
265 		ch->skb_head->truesize += skb->truesize;
269 		ch->skb_head->protocol = eth_type_trans(ch->skb_head, net_dev);
271 		net_dev->stats.rx_bytes += ch->skb_head->len;
272 		netif_receive_skb(ch->skb_head);
273 		ch->skb_head = NULL;
274 		ch->skb_tail = NULL;
285 	struct xrx200_chan *ch = container_of(napi,
291 		struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
294 			ret = xrx200_hw_receive(ch);
306 		if (napi_complete_done(&ch->napi, rx))
307 			ltq_dma_enable_irq(&ch->dma);
315 	struct xrx200_chan *ch = container_of(napi,
317 	struct net_device *net_dev = ch->priv->net_dev;
323 		struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->tx_free];
326 			struct sk_buff *skb = ch->skb[ch->tx_free];
330 			ch->skb[ch->tx_free] = NULL;
332 			memset(&ch->dma.desc_base[ch->tx_free], 0,
334 			ch->tx_free++;
335 			ch->tx_free %= LTQ_DESC_NUM;
343 	netdev_completed_queue(ch->priv->net_dev, pkts, bytes);
350 		if (napi_complete_done(&ch->napi, pkts))
351 			ltq_dma_enable_irq(&ch->dma);
361 	struct xrx200_chan *ch = &priv->chan_tx;
362 	struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
375 	if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) {
381 	ch->skb[ch->dma.desc] = skb;
395 	ch->dma.desc++;
396 	ch->dma.desc %= LTQ_DESC_NUM;
397 	if (ch->dma.desc == ch->tx_free)
472 	struct xrx200_chan *ch = ptr;
474 	if (napi_schedule_prep(&ch->napi)) {
475 		ltq_dma_disable_irq(&ch->dma);
476 		__napi_schedule(&ch->napi);
479 	ltq_dma_ack_irq(&ch->dma);