intel/ixgbe/ixgbe_ptp.c

18  * period of 6.4ns. In order to convert the scale counter into
20  * used. The SYSTIME registers need to be converted to ns values by use
32  * For the X540, MaxWidth is 31 bits, and the base period is 6.4 ns
33  * For the 82599, MaxWidth is 24 bits, and the base period is 6.4 ns
37  * At 1Gb link, the period is multiplied by 10. (64ns)
38  * At 100Mb link, the period is multiplied by 100. (640ns)
91  * clock cycle, the X550 will add 12.5 ns + TIMINCA which can result in a range
111  * provided. This register represents a + or minus nearly 0.5 ns adjustment to
112  * the base frequency. It is measured in 2^-32 ns units, with the high bit being
128  * For the X550, the Max adjustment is +/- 0.5 ns, and the base frequency is
133  * Because TIMINCA is measured in 2^-32 ns units, we have to convert 12.5 ns
165 	u64 ns = 0, clock_edge = 0, clock_period;
199 	ns = timecounter_read(&adapter->hw_tc);
204 	div_u64_rem(ns, NS_PER_SEC, &rem);
244 	u64 ns = 0, clock_edge = 0;
282 	ns = timecounter_read(&adapter->hw_tc);
287 	div_u64_rem(ns, NS_PER_SEC, &rem);
363  * cyclecounter structure used to construct a ns counter from the
402 	u64 ns;
433 	ns = timecounter_cyc2time(&adapter->hw_tc, timestamp);
436 	hwtstamp->hwtstamp = ns_to_ktime(ns);
543  * read the timecounter and return the correct value on ns,
554 	u64 ns, stamp;
582 	ns = timecounter_cyc2time(&adapter->hw_tc, stamp);
586 	*ts = ns_to_timespec64(ns);
605 	u64 ns = timespec64_to_ns(ts);
609 	timecounter_init(&adapter->hw_tc, &adapter->hw_cc, ns);
798  * if the timestamp is valid, we convert it into the timecounter ns
900  * if the timestamp is valid, we convert it into the timecounter ns