intel/ice/ice_ptp.c

15 	{ "SMA1",  SMA1, PTP_PF_NONE, 1, { 0, } },
49 	/* Parse SMA1/UFL1 */
53 		ptp_pins[SMA1].func = PTP_PF_NONE;
57 		ptp_pins[SMA1].func = PTP_PF_PEROUT;
61 		ptp_pins[SMA1].func = PTP_PF_EXTTS;
65 		ptp_pins[SMA1].func = PTP_PF_EXTTS;
113 	/* SMA1 and UFL1 cannot be set to TX at the same time */
114 	if (ptp_pins[SMA1].func == PTP_PF_PEROUT &&
130 	if (ptp_pins[SMA1].func == PTP_PF_NONE &&
132 		dev_info(ice_hw_to_dev(hw), "SMA1 + U.FL1 disabled");
134 	} else if (ptp_pins[SMA1].func == PTP_PF_EXTTS &&
136 		dev_info(ice_hw_to_dev(hw), "SMA1 RX");
138 	} else if (ptp_pins[SMA1].func == PTP_PF_NONE &&
141 		dev_info(ice_hw_to_dev(hw), "SMA1 RX + U.FL1 TX");
142 	} else if (ptp_pins[SMA1].func == PTP_PF_EXTTS &&
144 		dev_info(ice_hw_to_dev(hw), "SMA1 RX + U.FL1 TX");
145 	} else if (ptp_pins[SMA1].func == PTP_PF_PEROUT &&
147 		dev_info(ice_hw_to_dev(hw), "SMA1 TX");
196 	if (pin < SMA1 || func > PTP_PF_PEROUT)
204 	if (pin == SMA1 && ptp_pins[UFL1].func == func)
206 	if (pin == UFL1 && ptp_pins[SMA1].func == func)
207 		ptp_pins[SMA1].func = PTP_PF_NONE;
1811 			if (chan == ice_pin_desc_e810t[SMA1].chan)