Lines Matching defs:pf

35 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
38 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
39 static int i40e_setup_misc_vector(struct i40e_pf *pf);
40 static void i40e_determine_queue_usage(struct i40e_pf *pf);
41 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
42 static void i40e_prep_for_reset(struct i40e_pf *pf);
43 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
45 static int i40e_reset(struct i40e_pf *pf);
46 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
47 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
48 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
49 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
50 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
51 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
53 static int i40e_get_capabilities(struct i40e_pf *pf,
55 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
138 	struct i40e_pf *pf = i40e_hw_to_pf(hw);
140 	return &pf->pdev->dev;
153 	struct i40e_pf *pf = i40e_hw_to_pf(hw);
156 	mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
171 	struct i40e_pf *pf = i40e_hw_to_pf(hw);
173 	dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
216  * @pf: board private structure
223 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
230 		dev_info(&pf->pdev->dev,
239 	if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
241 			dev_err(&pf->pdev->dev,
309  * @pf: the pf structure to search for the vsi
312 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
317 	i40e_pf_for_each_vsi(pf, i, vsi)
326  * @pf: board private structure
330 void i40e_service_event_schedule(struct i40e_pf *pf)
332 	if ((!test_bit(__I40E_DOWN, pf->state) &&
333 	     !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
334 	      test_bit(__I40E_RECOVERY_MODE, pf->state))
335 		queue_work(i40e_wq, &pf->service_task);
351 	struct i40e_pf *pf = vsi->back;
356 	pf->tx_timeout_count++;
369 	if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
370 		pf->tx_timeout_recovery_level = 1;  /* reset after some time */
372 		      (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
376 	if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
382 		if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
383 			val = rd32(&pf->hw,
387 			val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
395 	pf->tx_timeout_last_recovery = jiffies;
397 		    pf->tx_timeout_recovery_level, txqueue);
399 	switch (pf->tx_timeout_recovery_level) {
401 		set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
404 		set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
407 		set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
411 		set_bit(__I40E_DOWN_REQUESTED, pf->state);
416 	i40e_service_event_schedule(pf);
417 	pf->tx_timeout_recovery_level++;
553  * @pf: the PF to be reset
555 void i40e_pf_reset_stats(struct i40e_pf *pf)
560 	memset(&pf->stats, 0, sizeof(pf->stats));
561 	memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
562 	pf->stat_offsets_loaded = false;
564 	i40e_pf_for_each_veb(pf, i, veb) {
571 	pf->hw_csum_rx_error = 0;
717 	struct i40e_pf *pf = vsi->back;
718 	struct i40e_hw *hw = &pf->hw;
779 	struct i40e_pf *pf = veb->pf;
780 	struct i40e_hw *hw = &pf->hw;
865 	struct i40e_pf *pf = vsi->back;
882 	    test_bit(__I40E_CONFIG_BUSY, pf->state))
994 		ns->rx_crc_errors = pf->stats.crc_errors;
995 		ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
996 		ns->rx_length_errors = pf->stats.rx_length_errors;
1002  * @pf: the PF to be updated
1004 static void i40e_update_pf_stats(struct i40e_pf *pf)
1006 	struct i40e_hw_port_stats *osd = &pf->stats_offsets;
1007 	struct i40e_hw_port_stats *nsd = &pf->stats;
1008 	struct i40e_hw *hw = &pf->hw;
1014 			   pf->stat_offsets_loaded,
1018 			   pf->stat_offsets_loaded,
1021 			   pf->stat_offsets_loaded,
1026 			   pf->stat_offsets_loaded,
1031 			   pf->stat_offsets_loaded,
1036 			   pf->stat_offsets_loaded,
1041 			   pf->stat_offsets_loaded,
1046 			   pf->stat_offsets_loaded,
1051 			   pf->stat_offsets_loaded,
1056 			   pf->stat_offsets_loaded,
1061 			   pf->stat_offsets_loaded,
1065 			   pf->stat_offsets_loaded,
1069 			   pf->stat_offsets_loaded,
1073 			   pf->stat_offsets_loaded,
1078 			   pf->stat_offsets_loaded,
1083 			   pf->stat_offsets_loaded,
1086 			   pf->stat_offsets_loaded,
1089 			   pf->stat_offsets_loaded,
1092 			   pf->stat_offsets_loaded,
1097 				   pf->stat_offsets_loaded,
1101 				   pf->stat_offsets_loaded,
1105 				   pf->stat_offsets_loaded,
1109 				   pf->stat_offsets_loaded,
1114 				   pf->stat_offsets_loaded,
1121 			   pf->stat_offsets_loaded,
1125 			   pf->stat_offsets_loaded,
1129 			   pf->stat_offsets_loaded,
1133 			   pf->stat_offsets_loaded,
1137 			   pf->stat_offsets_loaded,
1141 			   pf->stat_offsets_loaded,
1145 			   pf->stat_offsets_loaded,
1150 			   pf->stat_offsets_loaded,
1154 			   pf->stat_offsets_loaded,
1158 			   pf->stat_offsets_loaded,
1162 			   pf->stat_offsets_loaded,
1166 			   pf->stat_offsets_loaded,
1170 			   pf->stat_offsets_loaded,
1174 			   pf->stat_offsets_loaded,
1178 			   pf->stat_offsets_loaded,
1181 			   pf->stat_offsets_loaded,
1184 			   pf->stat_offsets_loaded,
1187 			   pf->stat_offsets_loaded,
1207 			   pf->stat_offsets_loaded,
1210 			   pf->stat_offsets_loaded,
1213 	if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
1214 	    !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1219 	if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
1220 	    !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1225 	pf->stat_offsets_loaded = true;
1236 	struct i40e_pf *pf = vsi->back;
1239 		i40e_update_pf_stats(pf);
1482 	struct i40e_pf *pf = vsi->back;
1492 		  !test_bit(I40E_FLAG_VF_VLAN_PRUNING_ENA, pf->flags));
1580 	struct i40e_pf *pf = vsi->back;
1591 	i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1599 	i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1798 	struct i40e_pf *pf = vsi->back;
1799 	struct i40e_hw *hw = &pf->hw;
1805 	if (test_bit(__I40E_DOWN, pf->state) ||
1806 	    test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1841 	i40e_service_event_schedule(pf);
1855 	struct i40e_pf *pf = vsi->back;
1856 	struct i40e_hw *hw = &pf->hw;
1864 			dev_info(&pf->pdev->dev,
1876 			dev_info(&pf->pdev->dev,
1892 	struct i40e_pf *pf = vsi->back;
1897 	if (!test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
1900 		vsi->rss_size = min_t(int, pf->alloc_rss_size,
1914 		i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
2025 	struct i40e_pf *pf = vsi->back;
2052 		else if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
2053 			vsi->num_queue_pairs = pf->num_lan_msix;
2072 			dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
2077 				   i40e_pf_get_max_q_per_tc(pf));
2084 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
2085 		num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
2097 					       pf->flags) &&
2099 					       pf->flags)) ||
2101 					qcount = min_t(int, pf->alloc_rss_size,
2470  * @pf: board private structure
2477 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2479 	struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
2480 	struct i40e_hw *hw = &pf->hw;
2484 	    i40e_pf_get_main_veb(pf) &&
2485 	    !test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
2500 			dev_info(&pf->pdev->dev,
2512 			dev_info(&pf->pdev->dev,
2522 			dev_info(&pf->pdev->dev,
2530 		pf->cur_promisc = promisc;
2556 	struct i40e_pf *pf;
2571 	pf = vsi->back;
2628 		else if (pf->vf)
2631 				 vlan_filters, pf->vf[vsi->vf_id].trusted);
2793 		dev_info(&pf->pdev->dev,
2801 	if (vsi->type == I40E_VSI_SRIOV && pf->vf &&
2802 	    !pf->vf[vsi->vf_id].trusted) {
2827 			dev_info(&pf->pdev->dev,
2833 			dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2843 		aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2847 			dev_info(&pf->pdev->dev,
2878  * @pf: board private structure
2880 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2885 	if (!pf)
2887 	if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2889 	if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2890 		set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2894 	i40e_pf_for_each_vsi(pf, v, vsi) {
2902 					pf->state);
2952 	struct i40e_pf *pf = vsi->back;
2967 	set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2968 	set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2981 	struct i40e_pf *pf = np->vsi->back;
2985 		return i40e_ptp_get_ts_config(pf, ifr);
2987 		return i40e_ptp_set_ts_config(pf, ifr);
3823  * @pf: Pointer to the targeted PF
3827 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3829 	pf->fd_tcp4_filter_cnt = 0;
3830 	pf->fd_udp4_filter_cnt = 0;
3831 	pf->fd_sctp4_filter_cnt = 0;
3832 	pf->fd_ip4_filter_cnt = 0;
3833 	pf->fd_tcp6_filter_cnt = 0;
3834 	pf->fd_udp6_filter_cnt = 0;
3835 	pf->fd_sctp6_filter_cnt = 0;
3836 	pf->fd_ip6_filter_cnt = 0;
3849 	struct i40e_pf *pf = vsi->back;
3852 	if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
3856 	i40e_reset_fdir_filter_cnt(pf);
3859 				  &pf->fdir_filter_list, fdir_node) {
3889 	struct i40e_pf *pf = vsi->back;
3890 	struct i40e_hw *hw = &pf->hw;
3976  * @pf: pointer to private device data structure
3978 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3980 	struct i40e_hw *hw = &pf->hw;
3996 	if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags))
3999 	if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
4020 	struct i40e_pf *pf = vsi->back;
4021 	struct i40e_hw *hw = &pf->hw;
4033 	i40e_enable_misc_int_causes(pf);
4057  * @pf: board private structure
4059 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
4061 	struct i40e_hw *hw = &pf->hw;
4070  * @pf: board private structure
4072 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
4074 	struct i40e_hw *hw = &pf->hw;
4139 	struct i40e_pf *pf = vsi->back;
4150 		irq_num = pf->msix_entries[base + vector].vector;
4172 			dev_info(&pf->pdev->dev,
4198 		irq_num = pf->msix_entries[base + vector].vector;
4212 	struct i40e_pf *pf = vsi->back;
4213 	struct i40e_hw *hw = &pf->hw;
4235 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4242 			synchronize_irq(pf->msix_entries[i + base].vector);
4248 		synchronize_irq(pf->pdev->irq);
4258 	struct i40e_pf *pf = vsi->back;
4261 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4265 		i40e_irq_dynamic_enable_icr0(pf);
4268 	i40e_flush(&pf->hw);
4274  * @pf: board private structure
4276 static void i40e_free_misc_vector(struct i40e_pf *pf)
4279 	wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4280 	i40e_flush(&pf->hw);
4282 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags) && pf->msix_entries) {
4283 		free_irq(pf->msix_entries[0].vector, pf);
4284 		clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
4299 	struct i40e_pf *pf = (struct i40e_pf *)data;
4300 	struct i40e_hw *hw = &pf->hw;
4315 		pf->sw_int_count++;
4317 	if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags) &&
4320 		dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4321 		set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4326 		struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
4335 		if (!test_bit(__I40E_DOWN, pf->state))
4341 		set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4342 		i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4347 		set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4352 		if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4359 			set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4364 		if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4365 			set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4370 			pf->corer_count++;
4372 			pf->globr_count++;
4374 			pf->empr_count++;
4375 			set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4381 		dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4382 		dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4391 			schedule_work(&pf->ptp_extts0_work);
4394 			i40e_ptp_tx_hwtstamp(pf);
4405 		dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4410 			dev_info(&pf->pdev->dev, "device will be reset\n");
4411 			set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4412 			i40e_service_event_schedule(pf);
4421 	if (!test_bit(__I40E_DOWN, pf->state) ||
4422 	    test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4423 		i40e_service_event_schedule(pf);
4424 		i40e_irq_dynamic_enable_icr0(pf);
4619 	struct i40e_pf *pf = vsi->back;
4622 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
4624 	else if (test_bit(I40E_FLAG_MSI_ENA, pf->flags))
4625 		err = request_irq(pf->pdev->irq, i40e_intr, 0,
4626 				  pf->int_name, pf);
4628 		err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4629 				  pf->int_name, pf);
4632 		dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4649 	struct i40e_pf *pf = vsi->back;
4656 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4660 		i40e_intr(pf->pdev->irq, netdev);
4669  * @pf: the PF being configured
4678 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4684 		tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4698  * @pf: the PF structure
4706 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4708 	struct i40e_hw *hw = &pf->hw;
4713 	i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4743  * @pf: the PF structure
4748 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4753 	i40e_control_tx_q(pf, pf_q, enable);
4756 	ret = i40e_pf_txq_wait(pf, pf_q, enable);
4758 		dev_info(&pf->pdev->dev,
4773 	struct i40e_pf *pf = vsi->back;
4778 		ret = i40e_control_wait_tx_q(vsi->seid, pf,
4787 		ret = i40e_control_wait_tx_q(vsi->seid, pf,
4798  * @pf: the PF being configured
4807 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4813 		rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4827  * @pf: the PF structure
4835 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4837 	struct i40e_hw *hw = &pf->hw;
4864  * @pf: the PF structure
4872 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4876 	i40e_control_rx_q(pf, pf_q, enable);
4879 	ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4892 	struct i40e_pf *pf = vsi->back;
4897 		ret = i40e_control_wait_rx_q(pf, pf_q, true);
4899 			dev_info(&pf->pdev->dev,
4934 	struct i40e_pf *pf = vsi->back;
4944 		i40e_pre_tx_queue_cfg(&pf->hw, pf_q, false);
4948 		i40e_control_rx_q(pf, pf_q, false);
4952 		wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4970 	struct i40e_pf *pf = vsi->back;
4975 		i40e_control_tx_q(pf, pf_q, false);
4976 		i40e_control_rx_q(pf, pf_q, false);
4986 	struct i40e_pf *pf = vsi->back;
4987 	struct i40e_hw *hw = &pf->hw;
4992 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
5005 			irq_num = pf->msix_entries[vector].vector;
5065 		free_irq(pf->pdev->irq, pf);
5148  * @pf: board private structure
5150 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
5153 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
5154 		pci_disable_msix(pf->pdev);
5155 		kfree(pf->msix_entries);
5156 		pf->msix_entries = NULL;
5157 		kfree(pf->irq_pile);
5158 		pf->irq_pile = NULL;
5159 	} else if (test_bit(I40E_FLAG_MSI_ENA, pf->flags)) {
5160 		pci_disable_msi(pf->pdev);
5162 	clear_bit(I40E_FLAG_MSI_ENA, pf->flags);
5163 	clear_bit(I40E_FLAG_MSIX_ENA, pf->flags);
5168  * @pf: board private structure
5173 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5178 	if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5179 		i40e_free_misc_vector(pf);
5181 	i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
5184 	i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
5186 	i40e_pf_for_each_vsi(pf, i, vsi)
5189 	i40e_reset_interrupt_capability(pf);
5236 	struct i40e_pf *pf = vsi->back;
5243 	set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
5244 	if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5245 		set_bit(__I40E_CLIENT_RESET, pf->state);
5281  * @pf: the PF
5283 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5288 	i40e_pf_for_each_vsi(pf, v, vsi)
5294  * @pf: the PF
5296 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5301 	i40e_pf_for_each_vsi(pf, v, vsi)
5313 	struct i40e_pf *pf = vsi->back;
5319 		ret = i40e_pf_txq_wait(pf, pf_q, false);
5321 			dev_info(&pf->pdev->dev,
5331 		ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5334 			dev_info(&pf->pdev->dev,
5341 		ret = i40e_pf_rxq_wait(pf, pf_q, false);
5343 			dev_info(&pf->pdev->dev,
5356  * @pf: the PF
5361 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5366 	i40e_pf_for_each_vsi(pf, v, vsi) {
5379  * @pf: pointer to PF
5384 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5387 	struct i40e_hw *hw = &pf->hw;
5469  * @pf: PF being queried
5474 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5476 	struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
5487  * @pf: PF being queried
5491 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5496 	if (i40e_is_tc_mqprio_enabled(pf)) {
5497 		struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
5503 	if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags))
5507 	if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
5508 		return i40e_dcb_get_num_tc(&pf->hw.local_dcbx_config);
5511 	if (pf->hw.func_caps.iscsi)
5512 		enabled_tc =  i40e_get_iscsi_tc_map(pf);
5525  * @pf: PF being queried
5529 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5531 	if (i40e_is_tc_mqprio_enabled(pf))
5532 		return i40e_mqprio_get_enabled_tc(pf);
5537 	if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags))
5541 	if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
5542 		return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5545 	if (pf->hw.func_caps.iscsi)
5546 		return i40e_get_iscsi_tc_map(pf);
5561 	struct i40e_pf *pf = vsi->back;
5562 	struct i40e_hw *hw = &pf->hw;
5570 		dev_info(&pf->pdev->dev,
5573 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5581 		dev_info(&pf->pdev->dev,
5584 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5589 		dev_info(&pf->pdev->dev,
5623 	struct i40e_pf *pf = vsi->back;
5628 	if (i40e_is_tc_mqprio_enabled(pf))
5630 	if (!vsi->mqprio_qopt.qopt.hw && !test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
5633 			dev_info(&pf->pdev->dev,
5643 	ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5645 		dev_info(&pf->pdev->dev,
5647 			 pf->hw.aq.asq_last_status);
5666 	struct i40e_pf *pf = vsi->back;
5667 	struct i40e_hw *hw = &pf->hw;
5700 	if (i40e_is_tc_mqprio_enabled(pf))
5740 	struct i40e_pf *pf;
5746 	pf = vsi->back;
5747 	hw = &pf->hw;
5760 		vsi->rss_size = min_t(int, pf->alloc_rss_size,
5764 			dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5772 		dev_info(&pf->pdev->dev, "Update vsi config failed, err %pe aq_err %s\n",
5800 	struct i40e_pf *pf = vsi->back;
5801 	struct i40e_hw *hw = &pf->hw;
5821 		dev_info(&pf->pdev->dev,
5827 			dev_info(&pf->pdev->dev,
5840 			dev_info(&pf->pdev->dev,
5848 			dev_err(&pf->pdev->dev,
5861 	if (i40e_is_tc_mqprio_enabled(pf)) {
5894 		dev_info(&pf->pdev->dev,
5907 		dev_info(&pf->pdev->dev,
5949 	struct i40e_pf *pf = vsi->back;
5951 	switch (pf->hw.phy.link_info.link_speed) {
5997 	struct i40e_pf *pf = vsi->back;
6004 		dev_err(&pf->pdev->dev,
6010 		dev_warn(&pf->pdev->dev,
6018 	ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
6021 		dev_err(&pf->pdev->dev,
6024 			i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6039 	struct i40e_pf *pf = vsi->back;
6083 					  &pf->cloud_filter_list, cloud_node) {
6095 			last_aq_status = pf->hw.aq.asq_last_status;
6097 				dev_info(&pf->pdev->dev,
6100 					 i40e_aq_str(&pf->hw, last_aq_status));
6140  * @pf: ptr to PF device
6149 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
6160 			dev_dbg(&pf->pdev->dev,
6166 			dev_dbg(&pf->pdev->dev,
6181 			dev_dbg(&pf->pdev->dev,
6201 	struct i40e_pf *pf = vsi->back;
6203 	struct i40e_hw *hw = &pf->hw;
6220 	i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
6232 		dev_info(&pf->pdev->dev,
6251  * @pf: ptr to PF device
6257 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6268 	qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6290  * @pf: ptr to PF device
6296 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6299 	struct i40e_hw *hw = &pf->hw;
6305 		dev_info(&pf->pdev->dev,
6318 	if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
6326 	i40e_channel_setup_queue_map(pf, &ctxt, ch);
6331 		dev_info(&pf->pdev->dev,
6334 			 i40e_aq_str(&pf->hw,
6335 				     pf->hw.aq.asq_last_status));
6389  * @pf: ptr to PF device
6396 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6441  * @pf: ptr to PF device
6450 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6462 	ret = i40e_add_channel(pf, uplink_seid, ch);
6464 		dev_info(&pf->pdev->dev,
6474 	ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6476 		dev_info(&pf->pdev->dev,
6484 	dev_dbg(&pf->pdev->dev,
6485 		"Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6494  * @pf: ptr to PF device
6501 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6512 		dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6518 	main_vsi = i40e_pf_get_main_vsi(pf);
6522 	ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6524 		dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6541 	struct i40e_pf *pf = vsi->back;
6542 	struct i40e_hw *hw = &pf->hw;
6545 	ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6558 			dev_err(&pf->pdev->dev,
6575 	ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6576 					pf->last_sw_conf_valid_flags,
6579 		dev_err(&pf->pdev->dev,
6599 	struct i40e_pf *pf = vsi->back;
6607 		dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6613 	err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6616 		dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6625 	if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
6626 		set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
6629 			if (i40e_is_tc_mqprio_enabled(pf))
6630 				i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
6632 				i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6643 		dev_dbg(&pf->pdev->dev,
6653 			dev_info(&pf->pdev->dev,
6660 	if (!i40e_setup_channel(pf, vsi, ch)) {
6661 		dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6665 	dev_info(&pf->pdev->dev,
6677 		dev_dbg(&pf->pdev->dev,
6760 	struct i40e_pf *pf = veb->pf;
6777 	ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6780 		dev_info(&pf->pdev->dev,
6783 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6790 		dev_info(&pf->pdev->dev,
6793 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6803  * @pf: PF struct
6809 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6818 	tc_map = i40e_pf_get_tc_map(pf);
6822 	i40e_pf_for_each_veb(pf, v, veb) {
6825 			dev_info(&pf->pdev->dev,
6833 	i40e_pf_for_each_vsi(pf, v, vsi) {
6838 			tc_map = i40e_pf_get_tc_map(pf);
6844 			dev_info(&pf->pdev->dev,
6859  * @pf: PF struct
6864 static int i40e_resume_port_tx(struct i40e_pf *pf)
6866 	struct i40e_hw *hw = &pf->hw;
6871 		dev_info(&pf->pdev->dev,
6874 			  i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6876 		set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6877 		i40e_service_event_schedule(pf);
6885  * @pf: PF struct
6889 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6891 	struct i40e_hw *hw = &pf->hw;
6894 	ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6896 		dev_info(&pf->pdev->dev,
6899 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6901 		set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6902 		i40e_service_event_schedule(pf);
6910  * @pf: PF being configured
6916 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6919 	struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6924 		dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6929 	i40e_pf_quiesce_all_vsi(pf);
6934 	ret = i40e_set_dcb_config(&pf->hw);
6936 		dev_info(&pf->pdev->dev,
6939 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6944 	i40e_dcb_reconfigure(pf);
6947 	if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6949 		ret = i40e_resume_port_tx(pf);
6953 		i40e_pf_unquiesce_all_vsi(pf);
6961  * @pf: PF being configured
6967 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6975 	struct i40e_hw *hw = &pf->hw;
6984 	dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
7026 	need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
7034 			set_bit(I40E_FLAG_DCB_ENA, pf->flags);
7036 			clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
7038 		set_bit(__I40E_PORT_SUSPENDED, pf->state);
7040 		i40e_pf_quiesce_all_vsi(pf);
7041 		ret = i40e_suspend_port_tx(pf);
7050 		(hw, pf->mac_seid, &ets_data,
7053 		dev_info(&pf->pdev->dev,
7056 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7076 		struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
7085 	i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
7088 	pf->pb_cfg = pb_cfg;
7091 	ret = i40e_aq_dcb_updated(&pf->hw, NULL);
7093 		dev_info(&pf->pdev->dev,
7096 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7104 	i40e_dcb_reconfigure(pf);
7108 		ret = i40e_resume_port_tx(pf);
7110 		clear_bit(__I40E_PORT_SUSPENDED, pf->state);
7116 		ret = i40e_pf_wait_queues_disabled(pf);
7119 			set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
7120 			i40e_service_event_schedule(pf);
7123 			i40e_pf_unquiesce_all_vsi(pf);
7124 			set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7125 			set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
7128 		if (test_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps))
7129 			ret = i40e_hw_set_dcb_config(pf, new_cfg);
7138  * @pf: PF being queried
7142 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
7144 	struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
7146 	struct i40e_hw *hw = &pf->hw;
7149 	if (test_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps)) {
7151 		memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
7152 		pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7153 		pf->tmp_cfg.etscfg.maxtcs = 0;
7154 		pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7155 		pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
7156 		pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
7157 		pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
7159 		pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
7160 		pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
7161 		pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
7162 		pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
7164 		return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
7174 		(hw, pf->mac_seid, &ets_data,
7177 		dev_info(&pf->pdev->dev,
7180 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7197  * @pf: PF being configured
7202 static int i40e_init_pf_dcb(struct i40e_pf *pf)
7204 	struct i40e_hw *hw = &pf->hw;
7210 	if (test_bit(I40E_HW_CAP_NO_DCB_SUPPORT, pf->hw.caps)) {
7211 		dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7215 	if (test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags)) {
7216 		dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7217 		err = i40e_dcb_sw_default_config(pf);
7219 			dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7222 		dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7223 		pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7226 		set_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
7227 		clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
7235 			dev_info(&pf->pdev->dev,
7239 			pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7242 			set_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
7247 				set_bit(I40E_FLAG_DCB_ENA, pf->flags);
7249 				clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
7250 			dev_dbg(&pf->pdev->dev,
7253 	} else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
7254 		dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7255 		set_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags);
7257 		dev_info(&pf->pdev->dev,
7260 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7276 	struct i40e_pf *pf = vsi->back;
7284 		new_speed = pf->hw.phy.link_info.link_speed;
7300 	if (pf->hw.func_caps.npar_enable &&
7301 	    (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7302 	     pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7306 	switch (pf->hw.phy.link_info.link_speed) {
7335 	switch (pf->hw.fc.current_mode) {
7350 	if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7355 		if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7358 		if (pf->hw.phy.link_info.fec_info &
7361 		else if (pf->hw.phy.link_info.fec_info &
7379 	} else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7384 		if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7387 		if (pf->hw.phy.link_info.fec_info &
7391 		if (pf->hw.phy.link_info.req_fec_info &
7412 	struct i40e_pf *pf = vsi->back;
7415 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
7429 	if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7439 		pf->fd_add_err = 0;
7440 		pf->fd_atr_cnt = 0;
7447 	set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7448 	i40e_service_event_schedule(pf);
7462 	struct i40e_pf *pf = vsi->back;
7464 	while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7469 	clear_bit(__I40E_CONFIG_BUSY, pf->state);
7474  * @pf: board private structure
7477 static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7482 	struct i40e_hw *hw = &pf->hw;
7496 		dev_err(&pf->pdev->dev,
7508 		dev_err(&pf->pdev->dev,
7519 	if (test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags))
7535 	if (test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags)) {
7553 		dev_err(&pf->pdev->dev,
7556 			i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7841 	struct i40e_pf *pf = vsi->back;
7842 	struct i40e_hw *hw = &pf->hw;
7894 		dev_info(&pf->pdev->dev,
7914 	struct i40e_pf *pf = vsi->back;
7915 	struct i40e_hw *hw = &pf->hw;
7951 		dev_info(&pf->pdev->dev,
7967 		dev_info(&pf->pdev->dev,
7987 		if (!i40e_setup_channel(pf, vsi, ch)) {
8001 	dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
8017 	struct i40e_pf *pf = vsi->back;
8021 	if (test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
8025 	if (i40e_is_tc_mqprio_enabled(pf)) {
8029 	if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
8041 		/* reserve bit 0 for the pf device */
8048 		vectors = pf->num_lan_msix;
8125 	struct i40e_pf *pf = vsi->back;
8126 	struct i40e_hw *hw = &pf->hw;
8162 	struct i40e_pf *pf = vsi->back;
8163 	struct i40e_hw *hw = &pf->hw;
8183 				dev_info(&pf->pdev->dev,
8203 	struct i40e_pf *pf = vsi->back;
8216 		clear_bit(I40E_FLAG_TC_MQPRIO_ENA, pf->flags);
8222 	if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
8229 		clear_bit(I40E_FLAG_TC_MQPRIO_ENA, pf->flags);
8232 		if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
8239 		if (num_tc > i40e_pf_get_num_tc(pf)) {
8246 		if (test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
8251 		if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
8258 		set_bit(I40E_FLAG_TC_MQPRIO_ENA, pf->flags);
8259 		clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
8278 	if (!hw && !i40e_is_tc_mqprio_enabled(pf))
8302 	if (i40e_is_tc_mqprio_enabled(pf)) {
8400 	struct i40e_pf *pf = vsi->back;
8439 		ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8442 		ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8445 		dev_dbg(&pf->pdev->dev,
8448 			pf->hw.aq.asq_last_status);
8450 		dev_info(&pf->pdev->dev,
8470 	struct i40e_pf *pf = vsi->back;
8528 		dev_err(&pf->pdev->dev,
8541 			dev_err(&pf->pdev->dev,
8547 		ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8550 		ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8555 		dev_dbg(&pf->pdev->dev,
8557 			add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8559 		dev_info(&pf->pdev->dev,
8580 	struct i40e_pf *pf = vsi->back;
8592 		dev_err(&pf->pdev->dev, "Unsupported key used: 0x%llx\n",
8632 				dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8642 				dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8660 				dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8688 				dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8698 				dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8705 			dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8722 			dev_err(&pf->pdev->dev,
8744 				dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8754 				dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8768 			dev_err(&pf->pdev->dev,
8823 	struct i40e_pf *pf = vsi->back;
8832 		dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8836 	if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8837 	    test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8840 	if (pf->fdir_pf_active_filters ||
8841 	    (!hlist_empty(&pf->fdir_filter_list))) {
8875 		dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8883 	hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8885 	pf->num_cloud_filters++;
8922 	struct i40e_pf *pf = vsi->back;
8939 		dev_err(&pf->pdev->dev,
8942 		return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8945 	pf->num_cloud_filters--;
8946 	if (!pf->num_cloud_filters)
8947 		if (test_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags) &&
8948 		    !test_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags)) {
8949 			set_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
8950 			clear_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags);
8951 			clear_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
9031 	struct i40e_pf *pf = vsi->back;
9035 	if (test_bit(__I40E_TESTING, pf->state) ||
9036 	    test_bit(__I40E_BAD_EEPROM, pf->state))
9041 	if (i40e_force_link_state(pf, true))
9049 	wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
9051 	wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
9054 	wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
9093 	struct i40e_pf *pf = vsi->back;
9111 			 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
9123 			 dev_driver_string(&pf->pdev->dev),
9124 			 dev_name(&pf->pdev->dev));
9149 		i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
9156  * @pf: Pointer to PF
9161 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
9168 				  &pf->fdir_filter_list, fdir_node) {
9173 	list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
9177 	INIT_LIST_HEAD(&pf->l3_flex_pit_list);
9179 	list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
9183 	INIT_LIST_HEAD(&pf->l4_flex_pit_list);
9185 	pf->fdir_pf_active_filters = 0;
9186 	i40e_reset_fdir_filter_cnt(pf);
9189 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9194 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
9199 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
9204 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
9209 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
9214 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
9219 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
9222 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
9226 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
9229 	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
9235  * @pf: Pointer to PF
9240 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9246 				  &pf->cloud_filter_list, cloud_node) {
9250 	pf->num_cloud_filters = 0;
9252 	if (test_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags) &&
9253 	    !test_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags)) {
9254 		set_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
9255 		clear_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags);
9256 		clear_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
9282  * @pf: board private structure
9291 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9308 		dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9309 		val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9311 		wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9319 		dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9320 		val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9322 		wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9323 		i40e_flush(&pf->hw);
9335 		dev_dbg(&pf->pdev->dev, "PFR requested\n");
9336 		i40e_handle_reset_warning(pf, lock_acquired);
9343 		i40e_prep_for_reset(pf);
9344 		i40e_reset_and_rebuild(pf, true, lock_acquired);
9345 		dev_info(&pf->pdev->dev,
9346 			 test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags) ?
9352 		dev_info(&pf->pdev->dev, "VSI reinit requested\n");
9354 		i40e_pf_for_each_vsi(pf, i, vsi) {
9361 		dev_info(&pf->pdev->dev, "VSI down requested\n");
9363 		i40e_pf_for_each_vsi(pf, i, vsi) {
9371 		dev_info(&pf->pdev->dev,
9379  * @pf: board private structure
9383 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9398 			dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9404 			dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9409 			dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9417 		dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9425 		dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9428 	dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9434  * @pf: board private structure
9437 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9442 	struct i40e_hw *hw = &pf->hw;
9452 	     !test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
9454 		set_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
9457 	if (!test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
9463 	dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9469 	dev_dbg(&pf->pdev->dev,
9485 	ret = i40e_get_dcb_config(&pf->hw);
9491 			dev_warn(&pf->pdev->dev,
9493 			clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
9495 			dev_info(&pf->pdev->dev,
9498 				 i40e_aq_str(&pf->hw,
9499 					     pf->hw.aq.asq_last_status));
9507 		dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9511 	need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9514 	i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9521 		set_bit(I40E_FLAG_DCB_ENA, pf->flags);
9523 		clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
9525 	set_bit(__I40E_PORT_SUSPENDED, pf->state);
9527 	i40e_pf_quiesce_all_vsi(pf);
9530 	i40e_dcb_reconfigure(pf);
9532 	ret = i40e_resume_port_tx(pf);
9534 	clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9540 	ret = i40e_pf_wait_queues_disabled(pf);
9543 		set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9544 		i40e_service_event_schedule(pf);
9546 		i40e_pf_unquiesce_all_vsi(pf);
9547 		set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9548 		set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9558  * @pf: board private structure
9562 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9565 	i40e_do_reset(pf, reset_flags, true);
9571  * @pf: board private structure
9577 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9584 	struct i40e_hw *hw = &pf->hw;
9588 	dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9598 	vf = &pf->vf[vf_id];
9607  * @pf: board private structure
9609 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9613 	val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9620  * @pf: board private structure
9622 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9626 	val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9634  * @pf: board private structure
9636 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9640 	val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9648  * @pf: board private structure
9650 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9652 	if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9653 		if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
9654 		    (I40E_DEBUG_FD & pf->hw.debug_mask))
9655 			dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9660  * @pf: board private structure
9662 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9664 	if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9670 		i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9674 		if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
9675 		    (I40E_DEBUG_FD & pf->hw.debug_mask))
9676 			dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9682  * @pf: board private structure
9685 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9689 	pf->fdir_pf_active_filters--;
9690 	pf->fd_inv = 0;
9694 		pf->fd_tcp4_filter_cnt--;
9697 		pf->fd_udp4_filter_cnt--;
9700 		pf->fd_sctp4_filter_cnt--;
9703 		pf->fd_tcp6_filter_cnt--;
9706 		pf->fd_udp6_filter_cnt--;
9709 		pf->fd_udp6_filter_cnt--;
9714 			pf->fd_tcp4_filter_cnt--;
9717 			pf->fd_udp4_filter_cnt--;
9720 			pf->fd_sctp4_filter_cnt--;
9723 			pf->fd_ip4_filter_cnt--;
9730 			pf->fd_tcp6_filter_cnt--;
9733 			pf->fd_udp6_filter_cnt--;
9736 			pf->fd_sctp6_filter_cnt--;
9739 			pf->fd_ip6_filter_cnt--;
9752  * @pf: board private structure
9754 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9760 	if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9764 	fcnt_prog = i40e_get_global_fd_count(pf);
9765 	fcnt_avail = pf->fdir_pf_filter_count;
9767 	    (pf->fd_add_err == 0) ||
9768 	    (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9769 		i40e_reenable_fdir_sb(pf);
9776 	    pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9777 		i40e_reenable_fdir_atr(pf);
9780 	if (pf->fd_inv > 0) {
9782 					  &pf->fdir_filter_list, fdir_node)
9783 			if (filter->fd_id == pf->fd_inv)
9784 				i40e_delete_invalid_filter(pf, filter);
9792  * @pf: board private structure
9794 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9802 	if (!time_after(jiffies, pf->fd_flush_timestamp +
9809 	min_flush_time = pf->fd_flush_timestamp +
9811 	fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9815 		if (I40E_DEBUG_FD & pf->hw.debug_mask)
9816 			dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9820 	pf->fd_flush_timestamp = jiffies;
9821 	set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9823 	wr32(&pf->hw, I40E_PFQF_CTL_1,
9825 	i40e_flush(&pf->hw);
9826 	pf->fd_flush_cnt++;
9827 	pf->fd_add_err = 0;
9831 		reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9836 		dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9839 		i40e_fdir_filter_restore(i40e_pf_get_main_vsi(pf));
9840 		if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9841 			clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9842 		clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9843 		if (I40E_DEBUG_FD & pf->hw.debug_mask)
9844 			dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9850  * @pf: board private structure
9852 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9854 	return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9859  * @pf: board private structure
9861 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9865 	if (test_bit(__I40E_DOWN, pf->state))
9868 	if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9869 		i40e_fdir_flush_and_replay(pf);
9871 	i40e_fdir_check_and_reenable(pf);
9918 	struct i40e_pf *pf;
9921 	if (!veb || !veb->pf)
9923 	pf = veb->pf;
9926 	i40e_pf_for_each_vsi(pf, i, vsi)
9933  * @pf: board private structure
9935 static void i40e_link_event(struct i40e_pf *pf)
9937 	struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
9938 	struct i40e_veb *veb = i40e_pf_get_main_veb(pf);
9947 	pf->hw.phy.get_link_info = true;
9948 	old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9949 	status = i40e_get_link_status(&pf->hw, &new_link);
9953 		clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9958 		set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9959 		dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9964 	old_link_speed = pf->hw.phy.link_info_old.link_speed;
9965 	new_link_speed = pf->hw.phy.link_info.link_speed;
9983 	if (pf->vf)
9984 		i40e_vc_notify_link_state(pf);
9986 	if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
9987 		i40e_ptp_set_increment(pf);
9992 	if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9999 		dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
10000 		memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
10001 		err = i40e_dcb_sw_default_config(pf);
10003 			clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
10004 			clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
10006 			pf->dcbx_cap = DCB_CAP_DCBX_HOST |
10008 			set_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
10009 			clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
10017  * @pf: board private structure
10019 static void i40e_watchdog_subtask(struct i40e_pf *pf)
10026 	if (test_bit(__I40E_DOWN, pf->state) ||
10027 	    test_bit(__I40E_CONFIG_BUSY, pf->state))
10031 	if (time_before(jiffies, (pf->service_timer_previous +
10032 				  pf->service_timer_period)))
10034 	pf->service_timer_previous = jiffies;
10036 	if (test_bit(I40E_FLAG_LINK_POLLING_ENA, pf->flags) ||
10037 	    test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
10038 		i40e_link_event(pf);
10043 	i40e_pf_for_each_vsi(pf, i, vsi)
10047 	if (test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags)) {
10049 		i40e_pf_for_each_veb(pf, i, veb)
10053 	i40e_ptp_rx_hang(pf);
10054 	i40e_ptp_tx_hang(pf);
10059  * @pf: board private structure
10061 static void i40e_reset_subtask(struct i40e_pf *pf)
10065 	if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
10067 		clear_bit(__I40E_REINIT_REQUESTED, pf->state);
10069 	if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
10071 		clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
10073 	if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
10075 		clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
10077 	if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
10079 		clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
10081 	if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
10083 		clear_bit(__I40E_DOWN_REQUESTED, pf->state);
10089 	if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
10090 		i40e_prep_for_reset(pf);
10091 		i40e_reset(pf);
10092 		i40e_rebuild(pf, false, false);
10097 	    !test_bit(__I40E_DOWN, pf->state) &&
10098 	    !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
10099 		i40e_do_reset(pf, reset_flags, false);
10105  * @pf: board private structure
10108 static void i40e_handle_link_event(struct i40e_pf *pf,
10120 	i40e_link_event(pf);
10124 		dev_err(&pf->pdev->dev,
10126 		dev_err(&pf->pdev->dev,
10135 		    (!test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags))) {
10136 			dev_err(&pf->pdev->dev,
10138 			dev_err(&pf->pdev->dev,
10146  * @pf: board private structure
10148 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
10151 	struct i40e_hw *hw = &pf->hw;
10159 	if (test_bit(__I40E_RESET_FAILED, pf->state))
10163 	val = rd32(&pf->hw, I40E_PF_ARQLEN);
10167 			dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
10172 			dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
10174 		pf->arq_overflows++;
10178 			dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
10182 		wr32(&pf->hw, I40E_PF_ARQLEN, val);
10184 	val = rd32(&pf->hw, I40E_PF_ATQLEN);
10187 		if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10188 			dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
10192 		if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10193 			dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
10197 		if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10198 			dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
10202 		wr32(&pf->hw, I40E_PF_ATQLEN, val);
10214 			dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10223 			i40e_handle_link_event(pf, &event);
10227 			ret = i40e_vc_process_vf_msg(pf,
10235 			dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10238 			i40e_handle_lldp_event(pf, &event);
10243 			dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10244 			i40e_handle_lan_overflow_event(pf, &event);
10247 			dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10252 			i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10257 			dev_info(&pf->pdev->dev,
10265 		clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
10278  * @pf: board private structure
10280 static void i40e_verify_eeprom(struct i40e_pf *pf)
10284 	err = i40e_diag_eeprom_test(&pf->hw);
10287 		err = i40e_diag_eeprom_test(&pf->hw);
10289 			dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10291 			set_bit(__I40E_BAD_EEPROM, pf->state);
10295 	if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10296 		dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10297 		clear_bit(__I40E_BAD_EEPROM, pf->state);
10303  * @pf: pointer to the PF structure
10307 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10309 	struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
10313 	ctxt.seid = pf->main_vsi_seid;
10314 	ctxt.pf_num = pf->hw.pf_id;
10316 	ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10318 		dev_info(&pf->pdev->dev,
10321 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10330 		dev_info(&pf->pdev->dev,
10333 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10339  * @pf: pointer to the PF structure
10343 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10345 	struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
10349 	ctxt.seid = pf->main_vsi_seid;
10350 	ctxt.pf_num = pf->hw.pf_id;
10352 	ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10354 		dev_info(&pf->pdev->dev,
10357 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10366 		dev_info(&pf->pdev->dev,
10369 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10383 	struct i40e_pf *pf = veb->pf;
10385 	if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10386 		dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10389 		i40e_disable_pf_switch_lb(pf);
10391 		i40e_enable_pf_switch_lb(pf);
10405 	struct i40e_pf *pf = veb->pf;
10413 	if (WARN_ON(veb->uplink_seid && veb->uplink_seid != pf->mac_seid)) {
10414 		dev_err(&pf->pdev->dev,
10419 	if (veb->uplink_seid == pf->mac_seid) {
10421 		ctl_vsi = i40e_pf_get_main_vsi(pf);
10425 			dev_err(&pf->pdev->dev,
10433 			dev_err(&pf->pdev->dev,
10448 		if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags))
10456 	i40e_pf_for_each_vsi(pf, v, vsi) {
10464 				dev_info(&pf->pdev->dev,
10478  * @pf: the PF struct
10481 static int i40e_get_capabilities(struct i40e_pf *pf,
10496 		err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10502 		if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10505 		} else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10506 			dev_info(&pf->pdev->dev,
10509 				 i40e_aq_str(&pf->hw,
10510 					     pf->hw.aq.asq_last_status));
10515 	if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10517 			dev_info(&pf->pdev->dev,
10518 				 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10519 				 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10520 				 pf->hw.func_caps.num_msix_vectors,
10521 				 pf->hw.func_caps.num_msix_vectors_vf,
10522 				 pf->hw.func_caps.fd_filters_guaranteed,
10523 				 pf->hw.func_caps.fd_filters_best_effort,
10524 				 pf->hw.func_caps.num_tx_qp,
10525 				 pf->hw.func_caps.num_vsis);
10527 			dev_info(&pf->pdev->dev,
10529 				 pf->hw.dev_caps.switch_mode,
10530 				 pf->hw.dev_caps.valid_functions);
10531 			dev_info(&pf->pdev->dev,
10533 				 pf->hw.dev_caps.sr_iov_1_1,
10534 				 pf->hw.dev_caps.num_vfs);
10535 			dev_info(&pf->pdev->dev,
10537 				 pf->hw.dev_caps.num_vsis,
10538 				 pf->hw.dev_caps.num_rx_qp,
10539 				 pf->hw.dev_caps.num_tx_qp);
10543 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10544 		       + pf->hw.func_caps.num_vfs)
10545 		if (pf->hw.revision_id == 0 &&
10546 		    pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10547 			dev_info(&pf->pdev->dev,
10549 				 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10550 			pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10560  * @pf: board private structure
10562 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10569 	if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10578 			wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10581 	if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
10585 	vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10589 		main_vsi = i40e_pf_get_main_vsi(pf);
10590 		vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, main_vsi->seid, 0);
10592 			dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10593 			clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
10594 			set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
10604  * @pf: board private structure
10606 static void i40e_fdir_teardown(struct i40e_pf *pf)
10610 	i40e_fdir_filter_exit(pf);
10611 	vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10627 	struct i40e_pf *pf = vsi->back;
10632 	hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10644 			dev_dbg(&pf->pdev->dev,
10647 				i40e_aq_str(&pf->hw,
10648 					    pf->hw.aq.asq_last_status));
10733  * @pf: board private structure
10737 static void i40e_prep_for_reset(struct i40e_pf *pf)
10739 	struct i40e_hw *hw = &pf->hw;
10744 	clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10745 	if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10747 	if (i40e_check_asq_alive(&pf->hw))
10748 		i40e_vc_notify_reset(pf);
10750 	dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10753 	i40e_pf_quiesce_all_vsi(pf);
10755 	i40e_pf_for_each_vsi(pf, v, vsi) {
10760 	i40e_shutdown_adminq(&pf->hw);
10766 			dev_warn(&pf->pdev->dev,
10773 	i40e_ptp_save_hw_time(pf);
10778  * @pf: PF struct
10780 static void i40e_send_version(struct i40e_pf *pf)
10789 	i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10840  * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10841  * @pf: board private structure
10843 static int i40e_reset(struct i40e_pf *pf)
10845 	struct i40e_hw *hw = &pf->hw;
10850 		dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10851 		set_bit(__I40E_RESET_FAILED, pf->state);
10852 		clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10854 		pf->pfr_count++;
10861  * @pf: board private structure
10866 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10868 	const bool is_recovery_mode_reported = i40e_check_recovery_mode(pf);
10869 	struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
10870 	struct i40e_hw *hw = &pf->hw;
10876 	if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10880 	if (test_bit(__I40E_DOWN, pf->state) &&
10881 	    !test_bit(__I40E_RECOVERY_MODE, pf->state))
10883 	dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10886 	ret = i40e_init_adminq(&pf->hw);
10888 		dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %pe aq_err %s\n",
10890 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10893 	i40e_get_oem_version(&pf->hw);
10895 	if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10901 	if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10902 		i40e_verify_eeprom(pf);
10908 	if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10909 		if (i40e_get_capabilities(pf,
10917 			if (i40e_setup_misc_vector_for_recovery_mode(pf))
10926 			free_irq(pf->pdev->irq, pf);
10927 			i40e_clear_interrupt_scheme(pf);
10928 			if (i40e_restore_interrupt_scheme(pf))
10933 		i40e_send_version(pf);
10942 	ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10949 		dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10954 		dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10963 	if (i40e_is_tc_mqprio_enabled(pf)) {
10970 			dev_warn(&pf->pdev->dev,
10972 			clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
10975 			ret = i40e_init_pf_dcb(pf);
10977 				dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10979 				clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
10988 	ret = i40e_setup_pf_switch(pf, reinit, true);
10995 	ret = i40e_aq_set_phy_int_mask(&pf->hw,
11000 		dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
11002 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11011 	if (vsi->uplink_seid != pf->mac_seid) {
11012 		dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
11015 		i40e_pf_for_each_veb(pf, v, veb) {
11026 			if (veb->uplink_seid == pf->mac_seid) {
11027 				dev_info(&pf->pdev->dev,
11030 				vsi->uplink_seid = pf->mac_seid;
11033 				dev_info(&pf->pdev->dev,
11040 	if (vsi->uplink_seid == pf->mac_seid) {
11041 		dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
11045 			dev_info(&pf->pdev->dev,
11094 	if (test_bit(I40E_HW_CAP_RESTART_AUTONEG, pf->hw.caps)) {
11096 		ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11098 			dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
11100 				 i40e_aq_str(&pf->hw,
11101 					     pf->hw.aq.asq_last_status));
11104 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
11105 		ret = i40e_setup_misc_vector(pf);
11116 	i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11117 						       pf->main_vsi_seid);
11120 	i40e_pf_unquiesce_all_vsi(pf);
11127 	ret = i40e_set_promiscuous(pf, pf->cur_promisc);
11129 		dev_warn(&pf->pdev->dev,
11131 			 pf->cur_promisc ? "on" : "off",
11133 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11135 	i40e_reset_all_vfs(pf, true);
11138 	i40e_send_version(pf);
11147 	clear_bit(__I40E_RESET_FAILED, pf->state);
11149 	clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
11150 	clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
11155  * @pf: board private structure
11160 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
11165 	if (test_bit(__I40E_IN_REMOVE, pf->state))
11171 	ret = i40e_reset(pf);
11173 		i40e_rebuild(pf, reinit, lock_acquired);
11178  * @pf: board private structure
11185 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
11187 	i40e_prep_for_reset(pf);
11188 	i40e_reset_and_rebuild(pf, false, lock_acquired);
11193  * @pf: pointer to the PF structure
11197 static void i40e_handle_mdd_event(struct i40e_pf *pf)
11199 	struct i40e_hw *hw = &pf->hw;
11205 	if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
11215 				pf->hw.func_caps.base_queue;
11216 		if (netif_msg_tx_err(pf))
11217 			dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11227 				pf->hw.func_caps.base_queue;
11228 		if (netif_msg_rx_err(pf))
11229 			dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11239 			dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11244 			dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11249 	for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11250 		vf = &(pf->vf[i]);
11255 			dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
11257 			dev_info(&pf->pdev->dev,
11266 			dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
11268 			dev_info(&pf->pdev->dev,
11275 	clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
11288 	struct i40e_pf *pf = container_of(work,
11294 	if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11295 	    test_bit(__I40E_SUSPENDED, pf->state))
11298 	if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
11301 	if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11302 		i40e_detect_recover_hung(pf);
11303 		i40e_sync_filters_subtask(pf);
11304 		i40e_reset_subtask(pf);
11305 		i40e_handle_mdd_event(pf);
11306 		i40e_vc_process_vflr_event(pf);
11307 		i40e_watchdog_subtask(pf);
11308 		i40e_fdir_reinit_subtask(pf);
11309 		if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
11311 			i40e_notify_client_of_netdev_close(pf, true);
11313 			i40e_client_subtask(pf);
11315 					       pf->state))
11316 				i40e_notify_client_of_l2_param_changes(pf);
11318 		i40e_sync_filters_subtask(pf);
11320 		i40e_reset_subtask(pf);
11323 	i40e_clean_adminq_subtask(pf);
11327 	clear_bit(__I40E_SERVICE_SCHED, pf->state);
11333 	if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11334 	    test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state)		 ||
11335 	    test_bit(__I40E_MDD_EVENT_PENDING, pf->state)		 ||
11336 	    test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11337 		i40e_service_event_schedule(pf);
11346 	struct i40e_pf *pf = from_timer(pf, t, service_timer);
11348 	mod_timer(&pf->service_timer,
11349 		  round_jiffies(jiffies + pf->service_timer_period));
11350 	i40e_service_event_schedule(pf);
11359 	struct i40e_pf *pf = vsi->back;
11363 		vsi->alloc_queue_pairs = pf->num_lan_qps;
11370 		if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
11371 			vsi->num_q_vectors = pf->num_lan_msix;
11383 		vsi->num_q_vectors = pf->num_fdsb_msix;
11387 		vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11394 		vsi->num_q_vectors = pf->num_vmdq_msix;
11398 		vsi->alloc_queue_pairs = pf->num_vf_qps;
11465  * @pf: board private structure
11471 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11479 	mutex_lock(&pf->switch_mutex);
11487 	i = pf->next_vsi;
11488 	while (i < pf->num_alloc_vsi && pf->vsi[i])
11490 	if (i >= pf->num_alloc_vsi) {
11492 		while (i < pf->next_vsi && pf->vsi[i])
11496 	if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11502 	pf->next_vsi = ++i;
11510 	vsi->back = pf;
11516 				pf->rss_table_size : 64;
11523 		vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11541 	pf->vsi[vsi_idx] = vsi;
11547 	pf->next_vsi = i - 1;
11550 	mutex_unlock(&pf->switch_mutex);
11598 	struct i40e_pf *pf;
11605 	pf = vsi->back;
11607 	mutex_lock(&pf->switch_mutex);
11608 	if (!pf->vsi[vsi->idx]) {
11609 		dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11614 	if (pf->vsi[vsi->idx] != vsi) {
11615 		dev_err(&pf->pdev->dev,
11616 			"pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11617 			pf->vsi[vsi->idx]->idx,
11618 			pf->vsi[vsi->idx]->type,
11624 	i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11625 	i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11631 	pf->vsi[vsi->idx] = NULL;
11632 	if (vsi->idx < pf->next_vsi)
11633 		pf->next_vsi = vsi->idx;
11636 	mutex_unlock(&pf->switch_mutex);
11669 	struct i40e_pf *pf = vsi->back;
11684 		ring->dev = &pf->pdev->dev;
11690 		ring->itr_setting = pf->tx_itr_default;
11701 		ring->dev = &pf->pdev->dev;
11708 		ring->itr_setting = pf->tx_itr_default;
11717 		ring->dev = &pf->pdev->dev;
11721 		ring->itr_setting = pf->rx_itr_default;
11734  * @pf: board private structure
11739 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11741 	vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11744 		dev_info(&pf->pdev->dev,
11754  * @pf: board private structure
11760 static int i40e_init_msix(struct i40e_pf *pf)
11762 	struct i40e_hw *hw = &pf->hw;
11769 	if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
11804 	pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11805 	vectors_left -= pf->num_lan_msix;
11808 	if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
11810 			pf->num_fdsb_msix = 1;
11814 			pf->num_fdsb_msix = 0;
11819 	if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11820 		iwarp_requested = pf->num_iwarp_msix;
11823 			pf->num_iwarp_msix = 0;
11824 		else if (vectors_left < pf->num_iwarp_msix)
11825 			pf->num_iwarp_msix = 1;
11826 		v_budget += pf->num_iwarp_msix;
11827 		vectors_left -= pf->num_iwarp_msix;
11831 	if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags)) {
11833 			pf->num_vmdq_msix = 0;
11834 			pf->num_vmdq_qps = 0;
11837 				pf->num_vmdq_vsis * pf->num_vmdq_qps;
11848 				pf->num_vmdq_qps = 1;
11849 				vmdq_vecs_wanted = pf->num_vmdq_vsis;
11854 			pf->num_vmdq_msix = pf->num_vmdq_qps;
11870 	extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11871 	pf->num_lan_msix += extra_vectors;
11877 	v_budget += pf->num_lan_msix;
11878 	pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11880 	if (!pf->msix_entries)
11884 		pf->msix_entries[i].entry = i;
11885 	v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11888 		clear_bit(I40E_FLAG_MSIX_ENA, pf->flags);
11889 		kfree(pf->msix_entries);
11890 		pf->msix_entries = NULL;
11891 		pci_disable_msix(pf->pdev);
11896 		pf->num_vmdq_vsis = 0;
11897 		pf->num_vmdq_qps = 0;
11898 		pf->num_lan_qps = 1;
11899 		pf->num_lan_msix = 1;
11909 		dev_info(&pf->pdev->dev,
11916 		pf->num_vmdq_msix = 1;    /* force VMDqs to only one vector */
11917 		pf->num_vmdq_vsis = 1;
11918 		pf->num_vmdq_qps = 1;
11923 			pf->num_lan_msix = 1;
11926 			if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11927 				pf->num_lan_msix = 1;
11928 				pf->num_iwarp_msix = 1;
11930 				pf->num_lan_msix = 2;
11934 			if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11935 				pf->num_iwarp_msix = min_t(int, (vec / 3),
11937 				pf->num_vmdq_vsis = min_t(int, (vec / 3),
11940 				pf->num_vmdq_vsis = min_t(int, (vec / 2),
11943 			if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
11944 				pf->num_fdsb_msix = 1;
11947 			pf->num_lan_msix = min_t(int,
11948 			       (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11949 							      pf->num_lan_msix);
11950 			pf->num_lan_qps = pf->num_lan_msix;
11955 	if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) && pf->num_fdsb_msix == 0) {
11956 		dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11957 		clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
11958 		set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
11960 	if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags) && pf->num_vmdq_msix == 0) {
11961 		dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11962 		clear_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
11965 	if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags) &&
11966 	    pf->num_iwarp_msix == 0) {
11967 		dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11968 		clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
11970 	i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11972 		   pf->num_lan_msix,
11973 		   pf->num_vmdq_msix * pf->num_vmdq_vsis,
11974 		   pf->num_fdsb_msix,
11975 		   pf->num_iwarp_msix);
12018 	struct i40e_pf *pf = vsi->back;
12022 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
12046  * @pf: board private structure to initialize
12048 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
12053 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
12054 		vectors = i40e_init_msix(pf);
12056 			clear_bit(I40E_FLAG_MSIX_ENA, pf->flags);
12057 			clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
12058 			clear_bit(I40E_FLAG_RSS_ENA, pf->flags);
12059 			clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
12060 			clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
12061 			clear_bit(I40E_FLAG_SRIOV_ENA, pf->flags);
12062 			clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
12063 			clear_bit(I40E_FLAG_FD_ATR_ENA, pf->flags);
12064 			clear_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
12065 			set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
12068 			i40e_determine_queue_usage(pf);
12072 	if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
12073 	    test_bit(I40E_FLAG_MSI_ENA, pf->flags)) {
12074 		dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
12075 		vectors = pci_enable_msi(pf->pdev);
12077 			dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
12079 			clear_bit(I40E_FLAG_MSI_ENA, pf->flags);
12084 	if (!test_bit(I40E_FLAG_MSI_ENA, pf->flags) &&
12085 	    !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
12086 		dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
12090 	pf->irq_pile = kzalloc(size, GFP_KERNEL);
12091 	if (!pf->irq_pile)
12094 	pf->irq_pile->num_entries = vectors;
12097 	(void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
12104  * @pf: private board data structure
12110 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
12119 	set_bit(I40E_FLAG_MSI_ENA, pf->flags);
12120 	set_bit(I40E_FLAG_MSIX_ENA, pf->flags);
12122 	err = i40e_init_interrupt_scheme(pf);
12129 	i40e_pf_for_each_vsi(pf, i, vsi) {
12137 	err = i40e_setup_misc_vector(pf);
12141 	if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags))
12142 		i40e_client_update_msix_info(pf);
12148 		if (pf->vsi[i])
12149 			i40e_vsi_free_q_vectors(pf->vsi[i]);
12158  * @pf: board private structure
12165 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
12169 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
12170 		err = i40e_setup_misc_vector(pf);
12173 			dev_info(&pf->pdev->dev,
12179 		u32 flags = test_bit(I40E_FLAG_MSI_ENA, pf->flags) ? 0 : IRQF_SHARED;
12181 		err = request_irq(pf->pdev->irq, i40e_intr, flags,
12182 				  pf->int_name, pf);
12185 			dev_info(&pf->pdev->dev,
12190 		i40e_enable_misc_int_causes(pf);
12191 		i40e_irq_dynamic_enable_icr0(pf);
12199  * @pf: board private structure
12205 static int i40e_setup_misc_vector(struct i40e_pf *pf)
12207 	struct i40e_hw *hw = &pf->hw;
12211 	if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
12212 		err = request_irq(pf->msix_entries[0].vector,
12213 				  i40e_intr, 0, pf->int_name, pf);
12215 			clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
12216 			dev_info(&pf->pdev->dev,
12218 				 pf->int_name, err);
12223 	i40e_enable_misc_int_causes(pf);
12231 	i40e_irq_dynamic_enable_icr0(pf);
12248 	struct i40e_pf *pf = vsi->back;
12249 	struct i40e_hw *hw = &pf->hw;
12256 			dev_info(&pf->pdev->dev,
12259 				 i40e_aq_str(&pf->hw,
12260 					     pf->hw.aq.asq_last_status));
12270 			dev_info(&pf->pdev->dev,
12273 				 i40e_aq_str(&pf->hw,
12274 					     pf->hw.aq.asq_last_status));
12294 	struct i40e_pf *pf = vsi->back;
12295 	struct i40e_hw *hw = &pf->hw;
12310 			dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12328 			dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12348 	struct i40e_pf *pf = vsi->back;
12349 	struct i40e_hw *hw = &pf->hw;
12381 	struct i40e_pf *pf = vsi->back;
12383 	if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
12400 	struct i40e_pf *pf = vsi->back;
12402 	if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
12410  * @pf: Pointer to board private structure
12415 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12426  * @pf: board private structure
12428 static int i40e_pf_config_rss(struct i40e_pf *pf)
12430 	struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
12433 	struct i40e_hw *hw = &pf->hw;
12441 	hena |= i40e_pf_get_default_rss_hena(pf);
12448 	reg_val = (pf->rss_table_size == 512) ?
12463 		vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12476 		i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12493  * @pf: board private structure
12500 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12502 	struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
12505 	if (!test_bit(I40E_FLAG_RSS_ENA, pf->flags))
12509 	new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12515 		i40e_prep_for_reset(pf);
12516 		if (test_bit(__I40E_IN_REMOVE, pf->state))
12517 			return pf->alloc_rss_size;
12519 		pf->alloc_rss_size = new_rss_size;
12521 		i40e_reset_and_rebuild(pf, true, true);
12528 			dev_dbg(&pf->pdev->dev,
12534 		vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12536 		i40e_pf_config_rss(pf);
12538 	dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count:  %d/%d\n",
12539 		 vsi->req_queue_pairs, pf->rss_size_max);
12540 	return pf->alloc_rss_size;
12545  * @pf: board private structure
12547 int i40e_get_partition_bw_setting(struct i40e_pf *pf)
12553 	status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12558 			pf->min_bw = min_bw;
12560 			pf->max_bw = max_bw;
12568  * @pf: board private structure
12570 int i40e_set_partition_bw_setting(struct i40e_pf *pf)
12578 	bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12579 	bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12580 	bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12583 	status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12590  * @pf: board private structure
12592 int i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12599 	if (pf->hw.partition_id != 1) {
12600 		dev_info(&pf->pdev->dev,
12602 			 pf->hw.partition_id);
12608 	ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12609 	last_aq_status = pf->hw.aq.asq_last_status;
12611 		dev_info(&pf->pdev->dev,
12614 			 i40e_aq_str(&pf->hw, last_aq_status));
12619 	ret = i40e_aq_read_nvm(&pf->hw,
12626 	last_aq_status = pf->hw.aq.asq_last_status;
12627 	i40e_release_nvm(&pf->hw);
12629 		dev_info(&pf->pdev->dev, "NVM read error, err %pe aq_err %s\n",
12631 			 i40e_aq_str(&pf->hw, last_aq_status));
12639 	ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12640 	last_aq_status = pf->hw.aq.asq_last_status;
12642 		dev_info(&pf->pdev->dev,
12645 			 i40e_aq_str(&pf->hw, last_aq_status));
12652 	ret = i40e_aq_update_nvm(&pf->hw,
12659 	last_aq_status = pf->hw.aq.asq_last_status;
12660 	i40e_release_nvm(&pf->hw);
12662 		dev_info(&pf->pdev->dev,
12665 			 i40e_aq_str(&pf->hw, last_aq_status));
12674  * @pf: board private structure
12676 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12691 	read_status = i40e_read_nvm_word(&pf->hw,
12696 	read_status = i40e_read_nvm_word(&pf->hw,
12703 		read_status = i40e_read_nvm_module_data(&pf->hw,
12711 		link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12717 	dev_warn(&pf->pdev->dev,
12725  * @pf: board private structure to initialize
12731 static int i40e_sw_init(struct i40e_pf *pf)
12738 	bitmap_zero(pf->flags, I40E_PF_FLAGS_NBITS);
12739 	set_bit(I40E_FLAG_MSI_ENA, pf->flags);
12740 	set_bit(I40E_FLAG_MSIX_ENA, pf->flags);
12743 	pf->rx_itr_default = I40E_ITR_RX_DEF;
12744 	pf->tx_itr_default = I40E_ITR_TX_DEF;
12749 	pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12750 	pf->alloc_rss_size = 1;
12751 	pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12752 	pf->rss_size_max = min_t(int, pf->rss_size_max,
12753 				 pf->hw.func_caps.num_tx_qp);
12757 	pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12759 	if (pf->hw.func_caps.rss) {
12760 		set_bit(I40E_FLAG_RSS_ENA, pf->flags);
12761 		pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12766 	if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12767 		set_bit(I40E_FLAG_MFP_ENA, pf->flags);
12768 		dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12769 		if (i40e_get_partition_bw_setting(pf)) {
12770 			dev_warn(&pf->pdev->dev,
12773 			dev_info(&pf->pdev->dev,
12775 				 pf->min_bw, pf->max_bw);
12778 			i40e_set_partition_bw_setting(pf);
12782 	if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12783 	    (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12784 		set_bit(I40E_FLAG_FD_ATR_ENA, pf->flags);
12785 		if (test_bit(I40E_FLAG_MFP_ENA, pf->flags) &&
12786 		    pf->hw.num_partitions > 1)
12787 			dev_info(&pf->pdev->dev,
12790 			set_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
12791 		pf->fdir_pf_filter_count =
12792 				 pf->hw.func_caps.fd_filters_guaranteed;
12793 		pf->hw.fdir_shared_filter_count =
12794 				 pf->hw.func_caps.fd_filters_best_effort;
12798 	if (test_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps))
12799 		set_bit(I40E_FLAG_HW_ATR_EVICT_ENA, pf->flags);
12801 	if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12802 		pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12803 		set_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
12804 		pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12807 	if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12808 		set_bit(I40E_FLAG_IWARP_ENA, pf->flags);
12810 		pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12817 	if (pf->hw.mac.type == I40E_MAC_XL710 &&
12818 	    pf->hw.func_caps.npar_enable)
12819 		clear_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps);
12822 	if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12823 		pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12824 		set_bit(I40E_FLAG_SRIOV_ENA, pf->flags);
12825 		pf->num_req_vfs = min_t(int,
12826 					pf->hw.func_caps.num_vfs,
12830 	pf->lan_veb = I40E_NO_VEB;
12831 	pf->lan_vsi = I40E_NO_VSI;
12834 	clear_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags);
12838 		+ (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12839 	pf->qp_pile = kzalloc(size, GFP_KERNEL);
12840 	if (!pf->qp_pile) {
12844 	pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12846 	pf->tx_timeout_recovery_level = 1;
12848 	if (pf->hw.mac.type != I40E_MAC_X722 &&
12849 	    i40e_is_total_port_shutdown_enabled(pf)) {
12853 		set_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags);
12854 		set_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags);
12855 		dev_info(&pf->pdev->dev,
12858 	mutex_init(&pf->switch_mutex);
12866  * @pf: board private structure to initialize
12871 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12880 		if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
12885 		if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12886 			set_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
12887 			clear_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
12891 		if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
12893 			i40e_fdir_filter_exit(pf);
12895 		clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
12896 		clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12897 		set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
12900 		pf->fd_add_err = 0;
12901 		pf->fd_atr_cnt = 0;
12903 		if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12904 			if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
12905 			    (I40E_DEBUG_FD & pf->hw.debug_mask))
12906 				dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12917 	struct i40e_pf *pf = vsi->back;
12918 	struct i40e_hw *hw = &pf->hw;
12929 		dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12967 	struct i40e_pf *pf = vsi->back;
12971 		i40e_pf_config_rss(pf);
12982 	    (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12983 		dev_err(&pf->pdev->dev,
12991 	need_reset = i40e_set_ntuple(pf, features);
12994 		i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13050 	struct i40e_pf *pf = np->vsi->back;
13051 	struct i40e_hw *hw = &pf->hw;
13053 	if (!test_bit(I40E_HW_CAP_PORT_ID_VALID, pf->hw.caps))
13079 	struct i40e_pf *pf = np->vsi->back;
13082 	if (!test_bit(I40E_FLAG_SRIOV_ENA, pf->flags))
13135 	struct i40e_pf *pf = vsi->back;
13145 	veb = i40e_pf_get_veb_by_seid(pf, vsi->uplink_seid);
13160 			veb = i40e_veb_setup(pf, vsi->uplink_seid, vsi->seid,
13175 				set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
13177 				clear_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
13178 			i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13205 	struct i40e_pf *pf = vsi->back;
13213 	veb = i40e_pf_get_veb_by_seid(pf, vsi->uplink_seid);
13289 	struct i40e_pf *pf = vsi->back;
13304 		i40e_prep_for_reset(pf);
13307 	if (test_bit(__I40E_IN_REMOVE, pf->state))
13318 		i40e_reset_and_rebuild(pf, true, true);
13357 	struct i40e_pf *pf = vsi->back;
13360 	while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13376 	struct i40e_pf *pf = vsi->back;
13378 	clear_bit(__I40E_CONFIG_BUSY, pf->state);
13451 	struct i40e_pf *pf = vsi->back;
13455 	ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13458 		dev_info(&pf->pdev->dev,
13464 	i40e_control_rx_q(pf, pf_q, enable);
13465 	ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13467 		dev_info(&pf->pdev->dev,
13482 	ret = i40e_control_wait_tx_q(vsi->seid, pf,
13486 		dev_info(&pf->pdev->dev,
13502 	struct i40e_pf *pf = vsi->back;
13503 	struct i40e_hw *hw = &pf->hw;
13506 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
13509 		i40e_irq_dynamic_enable_icr0(pf);
13522 	struct i40e_pf *pf = vsi->back;
13523 	struct i40e_hw *hw = &pf->hw;
13531 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
13536 		synchronize_irq(pf->msix_entries[intpf].vector);
13542 		synchronize_irq(pf->pdev->irq);
13677 	struct i40e_pf *pf = vsi->back;
13678 	struct i40e_hw *hw = &pf->hw;
13716 	if (!test_bit(I40E_HW_CAP_OUTER_UDP_CSUM, pf->hw.caps))
13719 	netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13752 	if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
13763 		SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13791 		struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
13866 	struct i40e_pf *pf = vsi->back;
13872 	veb = pf->veb[vsi->veb_idx];
13874 		dev_info(&pf->pdev->dev,
13901 	struct i40e_pf *pf = vsi->back;
13902 	struct i40e_hw *hw = &pf->hw;
13919 		ctxt.seid = pf->main_vsi_seid;
13920 		ctxt.pf_num = pf->hw.pf_id;
13922 		ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13925 			dev_info(&pf->pdev->dev,
13928 				 i40e_aq_str(&pf->hw,
13929 					     pf->hw.aq.asq_last_status));
13938 		enabled_tc = i40e_pf_get_tc_map(pf);
13944 		if (test_bit(I40E_FLAG_SOURCE_PRUNING_DIS, pf->flags)) {
13946 			ctxt.seid = pf->main_vsi_seid;
13947 			ctxt.pf_num = pf->hw.pf_id;
13955 				dev_info(&pf->pdev->dev,
13958 					 i40e_aq_str(&pf->hw,
13959 						     pf->hw.aq.asq_last_status));
13966 		if (test_bit(I40E_FLAG_MFP_ENA, pf->flags) &&
13967 		    !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13969 			ctxt.seid = pf->main_vsi_seid;
13970 			ctxt.pf_num = pf->hw.pf_id;
13975 				dev_info(&pf->pdev->dev,
13978 					 i40e_aq_str(&pf->hw,
13979 						    pf->hw.aq.asq_last_status));
13998 				dev_info(&pf->pdev->dev,
14002 					 i40e_aq_str(&pf->hw,
14003 						    pf->hw.aq.asq_last_status));
14014 		if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags) &&
14072 		if (pf->vf[vsi->vf_id].spoofchk) {
14097 				 i40e_aq_str(&pf->hw,
14098 					     pf->hw.aq.asq_last_status));
14120 		set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
14126 		dev_info(&pf->pdev->dev,
14129 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14149 	struct i40e_pf *pf;
14153 	pf = vsi->back;
14157 		dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
14161 	if (vsi->type == I40E_VSI_MAIN && !test_bit(__I40E_DOWN, pf->state)) {
14162 		dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
14182 		i40e_devlink_destroy_port(pf);
14217 	veb = i40e_pf_get_veb_by_seid(pf, uplink_seid);
14222 		i40e_pf_for_each_vsi(pf, i, vsi)
14250 	struct i40e_pf *pf = vsi->back;
14253 		dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14259 		dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14266 		dev_info(&pf->pdev->dev,
14276 	if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
14279 		vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
14282 		dev_info(&pf->pdev->dev,
14307 	struct i40e_pf *pf;
14313 	pf = vsi->back;
14315 	i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
14327 	ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14329 		dev_info(&pf->pdev->dev,
14339 	main_vsi = i40e_pf_get_main_vsi(pf);
14340 	main_vsi->seid = pf->main_vsi_seid;
14344 		i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
14364 		i40e_devlink_destroy_port(pf);
14365 	i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14373  * @pf: board private structure
14384 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14406 	veb = i40e_pf_get_veb_by_seid(pf, uplink_seid);
14407 	if (!veb && uplink_seid != pf->mac_seid) {
14408 		vsi = i40e_pf_get_vsi_by_seid(pf, uplink_seid);
14410 			dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14415 		if (vsi->uplink_seid == pf->mac_seid)
14416 			veb = i40e_veb_setup(pf, pf->mac_seid, vsi->seid,
14419 			veb = i40e_veb_setup(pf, vsi->uplink_seid, vsi->seid,
14431 			if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
14433 				clear_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
14437 		veb = i40e_pf_get_veb_by_seid(pf, vsi->uplink_seid);
14439 			dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14448 	v_idx = i40e_vsi_mem_alloc(pf, type);
14451 	vsi = pf->vsi[v_idx];
14458 		pf->lan_vsi = v_idx;
14465 	ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14467 		dev_info(&pf->pdev->dev,
14491 			ret = i40e_devlink_create_port(pf);
14494 			SET_NETDEV_DEVLINK_PORT(vsi->netdev, &pf->devlink_port);
14526 	if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps) &&
14547 		i40e_devlink_destroy_port(pf);
14549 	i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14566 	struct i40e_pf *pf = veb->pf;
14567 	struct i40e_hw *hw = &pf->hw;
14575 		dev_info(&pf->pdev->dev,
14578 			 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14585 		dev_info(&pf->pdev->dev,
14588 			 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14611  * @pf: board private structure
14616 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14623 	mutex_lock(&pf->switch_mutex);
14632 	while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14644 	veb->pf = pf;
14648 	pf->veb[i] = veb;
14651 	mutex_unlock(&pf->switch_mutex);
14664 	struct i40e_pf *pf = branch->pf;
14672 	i40e_pf_for_each_veb(pf, i, veb)
14681 	i40e_pf_for_each_vsi(pf, i, vsi)
14691 	if (pf->veb[veb_idx])
14692 		i40e_veb_release(pf->veb[veb_idx]);
14704 	if (veb->pf) {
14705 		struct i40e_pf *pf = veb->pf;
14707 		mutex_lock(&pf->switch_mutex);
14708 		if (pf->veb[veb->idx] == veb)
14709 			pf->veb[veb->idx] = NULL;
14710 		mutex_unlock(&pf->switch_mutex);
14723 	struct i40e_pf *pf;
14726 	pf = veb->pf;
14729 	i40e_pf_for_each_vsi(pf, i, vsi_it)
14740 		dev_info(&pf->pdev->dev,
14753 	i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14764 	struct i40e_pf *pf = veb->pf;
14765 	bool enable_stats = !!test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags);
14768 	ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi ? vsi->seid : 0,
14774 		dev_info(&pf->pdev->dev,
14777 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14782 	ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14785 		dev_info(&pf->pdev->dev,
14788 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14793 		dev_info(&pf->pdev->dev,
14796 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14797 		i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14812  * @pf: board private structure
14825 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 uplink_seid,
14836 		dev_info(&pf->pdev->dev,
14844 		vsi = i40e_pf_get_vsi_by_seid(pf, vsi_seid);
14846 			dev_err(&pf->pdev->dev, "vsi seid %d not found\n",
14853 	veb_idx = i40e_veb_mem_alloc(pf);
14856 	veb = pf->veb[veb_idx];
14865 	if (vsi && vsi->idx == pf->lan_vsi)
14866 		pf->lan_veb = veb->idx;
14878  * @pf: board private structure
14885 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14896 		dev_info(&pf->pdev->dev,
14902 		pf->mac_seid = seid;
14906 		if (uplink_seid != pf->mac_seid)
14908 		veb = i40e_pf_get_main_veb(pf);
14913 			veb = i40e_pf_get_veb_by_seid(pf, seid);
14915 				pf->lan_veb = veb->idx;
14917 				v = i40e_veb_mem_alloc(pf);
14920 				pf->lan_veb = v;
14924 		/* Try to get again main VEB as pf->lan_veb may have changed */
14925 		veb = i40e_pf_get_main_veb(pf);
14930 		veb->uplink_seid = pf->mac_seid;
14931 		veb->pf = pf;
14939 		pf->mac_seid = uplink_seid;
14940 		pf->main_vsi_seid = seid;
14942 			dev_info(&pf->pdev->dev,
14944 				 downlink_seid, pf->main_vsi_seid);
14955 		dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14963  * @pf: board private structure
14969 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14985 		ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14989 			dev_info(&pf->pdev->dev,
14992 				 i40e_aq_str(&pf->hw,
14993 					     pf->hw.aq.asq_last_status));
15002 			dev_info(&pf->pdev->dev,
15010 			i40e_setup_pf_switch_element(pf, ele, num_reported,
15021  * @pf: board private structure
15027 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
15034 	ret = i40e_fetch_switch_configuration(pf, false);
15036 		dev_info(&pf->pdev->dev,
15039 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15042 	i40e_pf_reset_stats(pf);
15050 	if ((pf->hw.pf_id == 0) &&
15051 	    !test_bit(I40E_FLAG_TRUE_PROMISC_ENA, pf->flags)) {
15053 		pf->last_sw_conf_flags = flags;
15056 	if (pf->hw.pf_id == 0) {
15060 		ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
15062 		if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
15063 			dev_info(&pf->pdev->dev,
15066 				 i40e_aq_str(&pf->hw,
15067 					     pf->hw.aq.asq_last_status));
15070 		pf->last_sw_conf_valid_flags = valid_flags;
15074 	main_vsi = i40e_pf_get_main_vsi(pf);
15082 		veb = i40e_pf_get_main_veb(pf);
15086 			uplink_seid = pf->mac_seid;
15088 			main_vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN,
15093 			dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
15094 			i40e_cloud_filter_exit(pf);
15095 			i40e_fdir_teardown(pf);
15100 		main_vsi->seid = pf->main_vsi_seid;
15105 	i40e_fdir_sb_setup(pf);
15108 	ret = i40e_setup_pf_filter_control(pf);
15110 		dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
15118 	if (test_bit(I40E_FLAG_RSS_ENA, pf->flags))
15119 		i40e_pf_config_rss(pf);
15122 	i40e_link_event(pf);
15124 	i40e_ptp_init(pf);
15140  * @pf: board private structure
15142 static void i40e_determine_queue_usage(struct i40e_pf *pf)
15147 	pf->num_lan_qps = 0;
15153 	queues_left = pf->hw.func_caps.num_tx_qp;
15156 	    !test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
15159 		pf->alloc_rss_size = pf->num_lan_qps = 1;
15162 		clear_bit(I40E_FLAG_RSS_ENA, pf->flags);
15163 		clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
15164 		clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
15165 		clear_bit(I40E_FLAG_FD_ATR_ENA, pf->flags);
15166 		clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
15167 		clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
15168 		clear_bit(I40E_FLAG_SRIOV_ENA, pf->flags);
15169 		clear_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
15170 		set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
15171 	} else if (!test_bit(I40E_FLAG_RSS_ENA, pf->flags) &&
15172 		   !test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
15173 		   !test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
15174 		   !test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags)) {
15176 		pf->alloc_rss_size = pf->num_lan_qps = 1;
15177 		queues_left -= pf->num_lan_qps;
15179 		clear_bit(I40E_FLAG_RSS_ENA, pf->flags);
15180 		clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
15181 		clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
15182 		clear_bit(I40E_FLAG_FD_ATR_ENA, pf->flags);
15183 		clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
15184 		clear_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
15185 		set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
15188 		if (test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags) &&
15190 			clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
15191 			clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
15192 			dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15196 		q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15197 		q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15198 		q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15199 		pf->num_lan_qps = q_max;
15201 		queues_left -= pf->num_lan_qps;
15204 	if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
15208 			clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
15209 			set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
15210 			dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15214 	if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
15215 	    pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15216 		pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15217 					(queues_left / pf->num_vf_qps));
15218 		queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15221 	if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags) &&
15222 	    pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15223 		pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15224 					  (queues_left / pf->num_vmdq_qps));
15225 		queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15228 	pf->queues_left = queues_left;
15229 	dev_dbg(&pf->pdev->dev,
15231 		pf->hw.func_caps.num_tx_qp,
15232 		!!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags),
15233 		pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15234 		pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15240  * @pf: PF to be setup
15245  * ethertype and macvlan type filter settings for the pf.
15249 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15251 	struct i40e_filter_control_settings *settings = &pf->filter_settings;
15256 	if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ||
15257 	    test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags))
15264 	if (i40e_set_filter_control(&pf->hw, settings))
15272 static void i40e_print_features(struct i40e_pf *pf)
15274 	struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
15275 	struct i40e_hw *hw = &pf->hw;
15285 	i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
15288 		       pf->hw.func_caps.num_vsis, main_vsi->num_queue_pairs);
15289 	if (test_bit(I40E_FLAG_RSS_ENA, pf->flags))
15291 	if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags))
15293 	if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
15297 	if (test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
15301 	if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
15303 	if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags))
15308 	dev_info(&pf->pdev->dev, "%s\n", buf);
15316  * @pf: board private structure
15323 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15325 	if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
15326 		i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
15358  * @pf: board private structure
15365 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15367 	u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15370 		dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15371 		dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15372 		set_bit(__I40E_RECOVERY_MODE, pf->state);
15376 	if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15377 		dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15384  * @pf: board private structure
15393  * state is to issue a series of pf-resets and check a return value.
15403 static int i40e_pf_loop_reset(struct i40e_pf *pf)
15407 	struct i40e_hw *hw = &pf->hw;
15417 		pf->pfr_count++;
15419 		dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15426  * @pf: board private structure
15435 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15437 	const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15445  * @pf: board private structure
15454 static int i40e_handle_resets(struct i40e_pf *pf)
15456 	const int pfr = i40e_pf_loop_reset(pf);
15457 	const bool is_empr = i40e_check_fw_empr(pf);
15460 		dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15467  * @pf: board private structure
15475 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15481 	pci_set_drvdata(pf->pdev, pf);
15482 	pci_save_state(pf->pdev);
15485 	timer_setup(&pf->service_timer, i40e_service_timer, 0);
15486 	pf->service_timer_period = HZ;
15488 	INIT_WORK(&pf->service_task, i40e_service_task);
15489 	clear_bit(__I40E_SERVICE_SCHED, pf->state);
15491 	err = i40e_init_interrupt_scheme(pf);
15500 	if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15501 		pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15503 		pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15506 	pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15508 	if (!pf->vsi) {
15516 	v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15521 	pf->lan_vsi = v_idx;
15522 	vsi = pf->vsi[v_idx];
15535 	i40e_dbg_pf_init(pf);
15537 	err = i40e_setup_misc_vector_for_recovery_mode(pf);
15542 	i40e_send_version(pf);
15545 	mod_timer(&pf->service_timer,
15546 		  round_jiffies(jiffies + pf->service_timer_period));
15551 	i40e_reset_interrupt_capability(pf);
15552 	timer_shutdown_sync(&pf->service_timer);
15555 	pci_release_mem_regions(pf->pdev);
15556 	pci_disable_device(pf->pdev);
15557 	i40e_free_pf(pf);
15571 	struct i40e_pf *pf = i40e_hw_to_pf(hw);
15573 	hw->subsystem_device_id = pf->pdev->subsystem_device ?
15574 		pf->pdev->subsystem_device :
15596 	struct i40e_pf *pf;
15634 	pf = i40e_alloc_pf(&pdev->dev);
15635 	if (!pf) {
15639 	pf->next_vsi = 0;
15640 	pf->pdev = pdev;
15641 	set_bit(__I40E_DOWN, pf->state);
15643 	hw = &pf->hw;
15645 	pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15652 	if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15654 			pf->ioremap_len);
15658 	hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15663 			 pf->ioremap_len, err);
15682 	INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15683 	INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15684 	INIT_LIST_HEAD(&pf->ddp_old_prof);
15692 	pf->msg_enable = netif_msg_init(debug,
15697 		pf->hw.debug_mask = debug;
15705 		pf->corer_count++;
15720 	err = i40e_handle_resets(pf);
15724 	i40e_check_recovery_mode(pf);
15736 	snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15738 		 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15748 	pf->hw.fc.requested_mode = I40E_FC_NONE;
15792 	i40e_verify_eeprom(pf);
15800 	err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15804 	err = i40e_sw_init(pf);
15810 	if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15811 		return i40e_init_recovery_mode(pf, hw);
15831 	if (test_bit(I40E_HW_CAP_STOP_FW_LLDP, pf->hw.caps)) {
15837 	i40e_get_platform_mac_addr(pdev, pf);
15848 		set_bit(I40E_HW_CAP_PORT_ID_VALID, pf->hw.caps);
15850 	i40e_ptp_alloc_pins(pf);
15851 	pci_set_drvdata(pdev, pf);
15855 	status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15858 		(clear_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags)) :
15859 		(set_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags));
15861 		 test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags) ?
15868 	err = i40e_init_pf_dcb(pf);
15871 		clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
15872 		clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
15878 	timer_setup(&pf->service_timer, i40e_service_timer, 0);
15879 	pf->service_timer_period = HZ;
15881 	INIT_WORK(&pf->service_task, i40e_service_task);
15882 	clear_bit(__I40E_SERVICE_SCHED, pf->state);
15887 		pf->wol_en = false;
15889 		pf->wol_en = true;
15890 	device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15893 	i40e_determine_queue_usage(pf);
15894 	err = i40e_init_interrupt_scheme(pf);
15900 	 * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15901 	 * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15904 		pf->num_lan_msix = 1;
15906 	pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15907 	pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15908 	pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15909 	pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15910 	pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15911 	pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15919 	if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15920 		pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15922 		pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15923 	if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15924 		dev_warn(&pf->pdev->dev,
15926 			 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15927 		pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15931 	pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15933 	if (!pf->vsi) {
15940 	if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
15941 	    test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
15942 	    !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15944 			set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
15947 	err = i40e_setup_pf_switch(pf, false, false);
15953 	vsi = i40e_pf_get_main_vsi(pf);
15957 	vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
15964 	err = i40e_aq_set_phy_int_mask(&pf->hw,
15969 		dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
15971 			 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15984 	if (test_bit(I40E_HW_CAP_RESTART_AUTONEG, pf->hw.caps)) {
15986 		err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15988 			dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
15990 				 i40e_aq_str(&pf->hw,
15991 					     pf->hw.aq.asq_last_status));
15997 	clear_bit(__I40E_DOWN, pf->state);
16004 	if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
16005 		err = i40e_setup_misc_vector(pf);
16009 			i40e_cloud_filter_exit(pf);
16010 			i40e_fdir_teardown(pf);
16017 	if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
16018 	    test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
16019 	    !test_bit(__I40E_BAD_EEPROM, pf->state)) {
16029 			err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
16038 	if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
16039 		pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
16040 						      pf->num_iwarp_msix,
16042 		if (pf->iwarp_base_vector < 0) {
16045 				 pf->num_iwarp_msix, pf->iwarp_base_vector);
16046 			clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
16050 	i40e_dbg_pf_init(pf);
16053 	i40e_send_version(pf);
16056 	mod_timer(&pf->service_timer,
16057 		  round_jiffies(jiffies + pf->service_timer_period));
16060 	if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
16061 		err = i40e_lan_add_device(pf);
16073 	if (!test_bit(I40E_HW_CAP_NO_PCI_LINK_CHECK, pf->hw.caps)) {
16080 		pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
16121 		dev_dbg(&pf->pdev->dev, "get requested speeds ret =  %pe last_status =  %s\n",
16123 			i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16124 	pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
16127 	i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, pf->flags);
16132 		dev_dbg(&pf->pdev->dev, "get supported phy types ret =  %pe last_status =  %s\n",
16134 			i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16139 			rd32(&pf->hw, I40E_PRTGL_SAH));
16142 			 pf->hw.port, val, MAX_FRAME_SIZE_DEFAULT);
16150 	i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
16151 						       pf->main_vsi_seid);
16153 	if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
16154 	    (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
16155 		set_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps);
16156 	if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
16157 		set_bit(I40E_HW_CAP_CRT_RETIMER, pf->hw.caps);
16159 	i40e_print_features(pf);
16161 	i40e_devlink_register(pf);
16167 	set_bit(__I40E_DOWN, pf->state);
16168 	i40e_clear_interrupt_scheme(pf);
16169 	kfree(pf->vsi);
16171 	i40e_reset_interrupt_capability(pf);
16172 	timer_shutdown_sync(&pf->service_timer);
16177 	kfree(pf->qp_pile);
16183 	i40e_free_pf(pf);
16203 	struct i40e_pf *pf = pci_get_drvdata(pdev);
16204 	struct i40e_hw *hw = &pf->hw;
16210 	i40e_devlink_unregister(pf);
16212 	i40e_dbg_pf_exit(pf);
16214 	i40e_ptp_stop(pf);
16224 	while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
16226 	set_bit(__I40E_IN_REMOVE, pf->state);
16228 	if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags)) {
16229 		set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
16230 		i40e_free_vfs(pf);
16231 		clear_bit(I40E_FLAG_SRIOV_ENA, pf->flags);
16234 	set_bit(__I40E_SUSPENDED, pf->state);
16235 	set_bit(__I40E_DOWN, pf->state);
16236 	if (pf->service_timer.function)
16237 		timer_shutdown_sync(&pf->service_timer);
16238 	if (pf->service_task.func)
16239 		cancel_work_sync(&pf->service_task);
16241 	if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16242 		struct i40e_vsi *vsi = pf->vsi[0];
16257 	i40e_notify_client_of_netdev_close(pf, false);
16259 	i40e_fdir_teardown(pf);
16264 	i40e_pf_for_each_veb(pf, i, veb)
16265 		if (veb->uplink_seid == pf->mac_seid ||
16272 	i40e_pf_for_each_vsi(pf, i, vsi) {
16275 		pf->vsi[i] = NULL;
16278 	i40e_cloud_filter_exit(pf);
16281 	if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
16282 		ret_code = i40e_lan_del_device(pf);
16299 	if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16300 	    !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
16301 		free_irq(pf->pdev->irq, pf);
16312 	i40e_clear_interrupt_scheme(pf);
16313 	i40e_pf_for_each_vsi(pf, i, vsi) {
16314 		if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16318 		pf->vsi[i] = NULL;
16322 	i40e_pf_for_each_veb(pf, i, veb) {
16324 		pf->veb[i] = NULL;
16327 	kfree(pf->qp_pile);
16328 	kfree(pf->vsi);
16331 	i40e_free_pf(pf);
16349 	struct i40e_pf *pf = pci_get_drvdata(pdev);
16353 	if (!pf) {
16360 	if (!test_bit(__I40E_SUSPENDED, pf->state))
16361 		i40e_prep_for_reset(pf);
16378 	struct i40e_pf *pf = pci_get_drvdata(pdev);
16393 		reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16409 	struct i40e_pf *pf = pci_get_drvdata(pdev);
16411 	i40e_prep_for_reset(pf);
16420 	struct i40e_pf *pf = pci_get_drvdata(pdev);
16422 	if (test_bit(__I40E_IN_REMOVE, pf->state))
16425 	i40e_reset_and_rebuild(pf, false, false);
16440 	struct i40e_pf *pf = pci_get_drvdata(pdev);
16443 	if (test_bit(__I40E_SUSPENDED, pf->state))
16446 	i40e_handle_reset_warning(pf, false);
16452  * @pf: pointer to i40e_pf struct
16454 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16456 	struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
16457 	struct i40e_hw *hw = &pf->hw;
16466 		dev_err(&pf->pdev->dev,
16482 		dev_err(&pf->pdev->dev,
16492 		dev_err(&pf->pdev->dev,
16502 	struct i40e_pf *pf = pci_get_drvdata(pdev);
16503 	struct i40e_hw *hw = &pf->hw;
16505 	set_bit(__I40E_SUSPENDED, pf->state);
16506 	set_bit(__I40E_DOWN, pf->state);
16508 	del_timer_sync(&pf->service_timer);
16509 	cancel_work_sync(&pf->service_task);
16510 	i40e_cloud_filter_exit(pf);
16511 	i40e_fdir_teardown(pf);
16516 	i40e_notify_client_of_netdev_close(pf, false);
16518 	if (test_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps) &&
16519 	    pf->wol_en)
16520 		i40e_enable_mc_magic_wake(pf);
16522 	i40e_prep_for_reset(pf);
16525 	     (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16527 	     (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16530 	if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16531 	    !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
16532 		free_irq(pf->pdev->irq, pf);
16539 	i40e_clear_interrupt_scheme(pf);
16543 		pci_wake_from_d3(pdev, pf->wol_en);
16554 	struct i40e_pf *pf = dev_get_drvdata(dev);
16555 	struct i40e_hw *hw = &pf->hw;
16558 	if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16561 	set_bit(__I40E_DOWN, pf->state);
16564 	del_timer_sync(&pf->service_timer);
16565 	cancel_work_sync(&pf->service_task);
16570 	i40e_notify_client_of_netdev_close(pf, false);
16572 	if (test_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps) &&
16573 	    pf->wol_en)
16574 		i40e_enable_mc_magic_wake(pf);
16582 	i40e_prep_for_reset(pf);
16584 	wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16585 	wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16592 	i40e_clear_interrupt_scheme(pf);
16605 	struct i40e_pf *pf = dev_get_drvdata(dev);
16609 	if (!test_bit(__I40E_SUSPENDED, pf->state))
16620 	err = i40e_restore_interrupt_scheme(pf);
16626 	clear_bit(__I40E_DOWN, pf->state);
16627 	i40e_reset_and_rebuild(pf, false, true);
16632 	clear_bit(__I40E_SUSPENDED, pf->state);
16635 	mod_timer(&pf->service_timer,
16636 		  round_jiffies(jiffies + pf->service_timer_period));