Lines Matching refs:phy_data
2110 u16 phy_data;
2117 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data);
2121 phy_data &= ~HV_SMB_ADDR_MASK;
2122 phy_data |= (strap >> E1000_STRAP_SMBUS_ADDRESS_SHIFT);
2123 phy_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID;
2128 phy_data &= ~HV_SMB_ADDR_FREQ_MASK;
2129 phy_data |= (freq & BIT(0)) <<
2131 phy_data |= (freq & BIT(1)) <<
2138 return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data);
2494 u16 phy_data;
2554 ret_val = e1e_rphy_locked(hw, BM_PORT_GEN_CFG, &phy_data);
2557 ret_val = e1e_wphy_locked(hw, BM_PORT_GEN_CFG, phy_data & 0x00FF);
5793 u16 phy_data;
5824 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
5825 hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
5826 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
5827 hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
5828 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
5829 hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
5830 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
5831 hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
5832 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
5833 hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
5834 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
5835 hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
5836 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
5837 hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);