intel/e1000e/ich8lan.c

3215 	u32 act_offset = E1000_ICH_NVM_SIG_WORD * 2 + 1;
3230 		act_offset = E1000_ICH_NVM_SIG_WORD;
3236 		ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset,
3248 		ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset +
3281 		ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset,
3292 		ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset +
3322 	u32 act_offset;
3344 	act_offset = (bank) ? nvm->flash_bank_size : 0;
3345 	act_offset += offset;
3355 				offset_to_read = act_offset + i -
3356 				    ((act_offset + i) % 2);
3363 				if ((act_offset + i) % 2 == 0)
3369 			offset_to_read = act_offset + i;
3415 	u32 act_offset;
3435 	act_offset = (bank) ? nvm->flash_bank_size : 0;
3436 	act_offset += offset;
3444 								act_offset + i,
3844 	u32 i, act_offset, new_bank_offset, old_bank_offset, bank;
3912 		act_offset = (i + new_bank_offset) << 1;
3917 		act_offset = i + new_bank_offset;
3918 		ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset,
3938 	act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD;
3941 	--act_offset;
3942 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);
3948 	ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword);
3954 	act_offset = old_bank_offset + E1000_ICH_NVM_SIG_WORD - 1;
3955 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);
3961 	ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword);
4005 	u32 i, act_offset, new_bank_offset, old_bank_offset, bank;
4063 		act_offset = (i + new_bank_offset) << 1;
4068 							       act_offset,
4075 							       act_offset + 1,
4095 	act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD;
4096 	ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data);
4102 						       act_offset * 2 + 1,
4112 	act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1;
4113 	ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0);