Lines Matching refs:sq

47 #define HW_CONS_IDX(sq)                 be16_to_cpu(*(u16 *)((sq)->hw_ci_addr))
503 qp = container_of(txq->sq, struct hinic_qp, sq);
512 sq_wqe = hinic_sq_get_wqe(txq->sq, wqe_size, &prod_idx);
516 sq_wqe = hinic_sq_get_wqe(txq->sq, wqe_size, &prod_idx);
533 hinic_sq_prepare_wqe(txq->sq, sq_wqe, txq->sges, nr_sges);
534 hinic_sq_write_wqe(txq->sq, prod_idx, sq_wqe, skb, wqe_size);
539 hinic_sq_write_db(txq->sq, prod_idx, wqe_size, 0);
564 qp = container_of(txq->sq, struct hinic_qp, sq);
593 sq_wqe = hinic_sq_get_wqe(txq->sq, wqe_size, &prod_idx);
600 sq_wqe = hinic_sq_get_wqe(txq->sq, wqe_size, &prod_idx);
617 hinic_sq_prepare_wqe(txq->sq, sq_wqe, txq->sges, nr_sges);
623 hinic_sq_write_wqe(txq->sq, prod_idx, sq_wqe, skb, wqe_size);
628 hinic_sq_write_db(txq->sq, prod_idx, wqe_size, 0);
633 hinic_sq_return_wqe(txq->sq, wqe_size);
668 struct hinic_sq *sq = txq->sq;
675 while ((sq_wqe = hinic_sq_read_wqebb(sq, &skb, &wqe_size, &ci))) {
676 sq_wqe = hinic_sq_read_wqe(sq, &skb, wqe_size, &ci);
684 hinic_sq_put_wqe(sq, wqe_size);
700 struct hinic_qp *qp = container_of(txq->sq, struct hinic_qp, sq);
703 struct hinic_sq *sq = txq->sq;
704 struct hinic_wq *wq = sq->wq;
713 hw_ci = HW_CONS_IDX(sq) & wq->mask;
718 sq_wqe = hinic_sq_read_wqebb(sq, &skb, &wqe_size, &sw_ci);
727 sq_wqe = hinic_sq_read_wqe(sq, &skb, wqe_size, &sw_ci);
739 hinic_sq_put_wqe(sq, wqe_size);
745 hinic_get_sq_free_wqebbs(sq) >= HINIC_MIN_TX_NUM_WQEBBS(sq)) {
768 sq->msix_entry,
787 txq->sq->msix_entry,
790 hinic_hwdev_msix_cnt_set(nic_dev->hwdev, txq->sq->msix_entry);
804 struct hinic_sq *sq = txq->sq;
808 qp = container_of(sq, struct hinic_qp, sq);
813 hinic_hwdev_msix_set(nic_dev->hwdev, sq->msix_entry,
819 interrupt_info.msix_index = sq->msix_entry;
832 err = request_irq(sq->irq, tx_irq, 0, txq->irq_name, txq);
844 struct hinic_sq *sq = txq->sq;
846 free_irq(sq->irq, txq);
853 * @sq: Hardware Tx Queue to connect the Logical queue with
858 int hinic_init_txq(struct hinic_txq *txq, struct hinic_sq *sq,
861 struct hinic_qp *qp = container_of(sq, struct hinic_qp, sq);
867 txq->sq = sq;
892 err = hinic_hwdev_hw_ci_addr_set(hwdev, sq, CI_UPDATE_NO_PENDING,