Lines Matching defs:hdev
8 static int hclge_ptp_get_cycle(struct hclge_dev *hdev)
10 struct hclge_ptp *ptp = hdev->ptp;
12 ptp->cycle.quo = readl(hdev->ptp->io_base + HCLGE_PTP_CYCLE_QUO_REG) &
14 ptp->cycle.numer = readl(hdev->ptp->io_base + HCLGE_PTP_CYCLE_NUM_REG);
15 ptp->cycle.den = readl(hdev->ptp->io_base + HCLGE_PTP_CYCLE_DEN_REG);
18 dev_err(&hdev->pdev->dev, "invalid ptp cycle denominator!\n");
27 struct hclge_dev *hdev = hclge_ptp_get_hdev(ptp);
28 struct hclge_ptp_cycle *cycle = &hdev->ptp->cycle;
43 spin_lock_irqsave(&hdev->ptp->lock, flags);
45 hdev->ptp->io_base + HCLGE_PTP_CYCLE_QUO_REG);
46 writel(numerator, hdev->ptp->io_base + HCLGE_PTP_CYCLE_NUM_REG);
47 writel(cycle->den, hdev->ptp->io_base + HCLGE_PTP_CYCLE_DEN_REG);
49 hdev->ptp->io_base + HCLGE_PTP_CYCLE_CFG_REG);
50 spin_unlock_irqrestore(&hdev->ptp->lock, flags);
58 struct hclge_dev *hdev = vport->back;
59 struct hclge_ptp *ptp = hdev->ptp;
62 test_and_set_bit(HCLGE_STATE_PTP_TX_HANDLING, &hdev->state)) {
74 void hclge_ptp_clean_tx_hwts(struct hclge_dev *hdev)
76 struct sk_buff *skb = hdev->ptp->tx_skb;
81 ns = readl(hdev->ptp->io_base + HCLGE_PTP_TX_TS_NSEC_REG) &
83 lo = readl(hdev->ptp->io_base + HCLGE_PTP_TX_TS_SEC_L_REG);
84 hi = readl(hdev->ptp->io_base + HCLGE_PTP_TX_TS_SEC_H_REG) &
86 hdev->ptp->last_tx_seqid = readl(hdev->ptp->io_base +
90 hdev->ptp->tx_skb = NULL;
91 hdev->ptp->tx_cleaned++;
99 clear_bit(HCLGE_STATE_PTP_TX_HANDLING, &hdev->state);
106 struct hclge_dev *hdev = vport->back;
111 if (!hdev->ptp || !test_bit(HCLGE_PTP_FLAG_RX_EN, &hdev->ptp->flags))
118 spin_lock_irqsave(&hdev->ptp->lock, flags);
119 sec_h = readl(hdev->ptp->io_base + HCLGE_PTP_CUR_TIME_SEC_H_REG);
120 spin_unlock_irqrestore(&hdev->ptp->lock, flags);
124 hdev->ptp->last_rx = jiffies;
125 hdev->ptp->rx_cnt++;
131 struct hclge_dev *hdev = hclge_ptp_get_hdev(ptp);
136 spin_lock_irqsave(&hdev->ptp->lock, flags);
137 ns = readl(hdev->ptp->io_base + HCLGE_PTP_CUR_TIME_NSEC_REG);
138 hi = readl(hdev->ptp->io_base + HCLGE_PTP_CUR_TIME_SEC_H_REG);
139 lo = readl(hdev->ptp->io_base + HCLGE_PTP_CUR_TIME_SEC_L_REG);
140 spin_unlock_irqrestore(&hdev->ptp->lock, flags);
151 struct hclge_dev *hdev = hclge_ptp_get_hdev(ptp);
154 spin_lock_irqsave(&hdev->ptp->lock, flags);
155 writel(ts->tv_nsec, hdev->ptp->io_base + HCLGE_PTP_TIME_NSEC_REG);
157 hdev->ptp->io_base + HCLGE_PTP_TIME_SEC_H_REG);
159 hdev->ptp->io_base + HCLGE_PTP_TIME_SEC_L_REG);
162 hdev->ptp->io_base + HCLGE_PTP_TIME_SYNC_REG);
163 spin_unlock_irqrestore(&hdev->ptp->lock, flags);
170 struct hclge_dev *hdev = hclge_ptp_get_hdev(ptp);
194 spin_lock_irqsave(&hdev->ptp->lock, flags);
195 writel(adj_val, hdev->ptp->io_base + HCLGE_PTP_TIME_NSEC_REG);
197 hdev->ptp->io_base + HCLGE_PTP_TIME_ADJ_REG);
198 spin_unlock_irqrestore(&hdev->ptp->lock, flags);
203 int hclge_ptp_get_cfg(struct hclge_dev *hdev, struct ifreq *ifr)
205 if (!test_bit(HCLGE_STATE_PTP_EN, &hdev->state))
208 return copy_to_user(ifr->ifr_data, &hdev->ptp->ts_cfg,
212 static int hclge_ptp_int_en(struct hclge_dev *hdev, bool en)
222 ret = hclge_cmd_send(&hdev->hw, &desc, 1);
224 dev_err(&hdev->pdev->dev,
231 int hclge_ptp_cfg_qry(struct hclge_dev *hdev, u32 *cfg)
239 ret = hclge_cmd_send(&hdev->hw, &desc, 1);
241 dev_err(&hdev->pdev->dev,
251 static int hclge_ptp_cfg(struct hclge_dev *hdev, u32 cfg)
260 ret = hclge_cmd_send(&hdev->hw, &desc, 1);
262 dev_err(&hdev->pdev->dev,
330 static int hclge_ptp_set_ts_mode(struct hclge_dev *hdev,
333 unsigned long flags = hdev->ptp->flags;
337 if (test_bit(HCLGE_PTP_FLAG_EN, &hdev->ptp->flags))
348 ret = hclge_ptp_cfg(hdev, ptp_cfg);
352 hdev->ptp->flags = flags;
353 hdev->ptp->ptp_cfg = ptp_cfg;
358 int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr)
363 if (!test_bit(HCLGE_STATE_PTP_EN, &hdev->state)) {
364 dev_err(&hdev->pdev->dev, "phc is unsupported\n");
371 ret = hclge_ptp_set_ts_mode(hdev, &cfg);
375 hdev->ptp->ts_cfg = cfg;
384 struct hclge_dev *hdev = vport->back;
386 if (!test_bit(HCLGE_STATE_PTP_EN, &hdev->state)) {
387 dev_err(&hdev->pdev->dev, "phc is unsupported\n");
398 if (hdev->ptp->clock)
399 info->phc_index = ptp_clock_index(hdev->ptp->clock);
422 static int hclge_ptp_create_clock(struct hclge_dev *hdev)
426 ptp = devm_kzalloc(&hdev->pdev->dev, sizeof(*ptp), GFP_KERNEL);
430 ptp->hdev = hdev;
443 ptp->clock = ptp_clock_register(&ptp->info, &hdev->pdev->dev);
445 dev_err(&hdev->pdev->dev,
450 dev_err(&hdev->pdev->dev, "failed to register ptp clock\n");
455 ptp->io_base = hdev->hw.hw.io_base + HCLGE_PTP_REG_OFFSET;
458 hdev->ptp = ptp;
463 static void hclge_ptp_destroy_clock(struct hclge_dev *hdev)
465 ptp_clock_unregister(hdev->ptp->clock);
466 hdev->ptp->clock = NULL;
467 devm_kfree(&hdev->pdev->dev, hdev->ptp);
468 hdev->ptp = NULL;
471 int hclge_ptp_init(struct hclge_dev *hdev)
473 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
480 if (!hdev->ptp) {
481 ret = hclge_ptp_create_clock(hdev);
485 ret = hclge_ptp_get_cycle(hdev);
490 ret = hclge_ptp_int_en(hdev, true);
494 set_bit(HCLGE_PTP_FLAG_EN, &hdev->ptp->flags);
495 ret = hclge_ptp_adjfine(&hdev->ptp->info, 0);
497 dev_err(&hdev->pdev->dev,
502 ret = hclge_ptp_set_ts_mode(hdev, &hdev->ptp->ts_cfg);
504 dev_err(&hdev->pdev->dev,
510 ret = hclge_ptp_settime(&hdev->ptp->info, &ts);
512 dev_err(&hdev->pdev->dev,
517 set_bit(HCLGE_STATE_PTP_EN, &hdev->state);
518 dev_info(&hdev->pdev->dev, "phc initializes ok!\n");
523 hclge_ptp_destroy_clock(hdev);
528 void hclge_ptp_uninit(struct hclge_dev *hdev)
530 struct hclge_ptp *ptp = hdev->ptp;
535 hclge_ptp_int_en(hdev, false);
536 clear_bit(HCLGE_STATE_PTP_EN, &hdev->state);
541 if (hclge_ptp_set_ts_mode(hdev, &ptp->ts_cfg))
542 dev_err(&hdev->pdev->dev, "failed to disable phc\n");
551 hclge_ptp_destroy_clock(hdev);