hns3/hns3pf/hclge_debugfs.c

139 	struct hclge_desc desc[HCLGE_GET_DFX_REG_TYPE_CNT];
144 	ret = hclge_query_bd_num_cmd_send(hdev, desc);
152 	entries_per_desc = ARRAY_SIZE(desc[0].data);
155 	*bd_num = le32_to_cpu(desc[offset / entries_per_desc].data[index]);
169 	struct hclge_desc *desc = desc_src;
172 	hclge_cmd_setup_basic_desc(desc, cmd, true);
173 	desc->data[0] = cpu_to_le32(index);
176 		desc->flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
177 		desc++;
178 		hclge_cmd_setup_basic_desc(desc, cmd, true);
198 	struct hclge_desc *desc;
221 		desc = desc_src;
222 		ret = hclge_dbg_cmd_send(hdev, desc, index, bd_num,
230 				desc++;
233 					  le32_to_cpu(desc->data[entry]));
251 	struct hclge_desc *desc;
262 	desc = desc_src;
264 	ret = hclge_dbg_cmd_send(hdev, desc, 0, bd_num, reg_msg->cmd);
266 		kfree(desc);
275 			desc++;
281 				  le32_to_cpu(desc->data[entry]));
309 	struct hclge_desc desc;
313 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true);
315 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
322 	req = (struct hclge_config_mac_mode_cmd *)desc.data;
339 	struct hclge_desc desc;
342 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAX_FRM_SIZE, true);
344 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
351 	req = (struct hclge_config_max_frm_size_cmd *)desc.data;
369 	struct hclge_desc desc;
372 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_SPEED_DUP, true);
374 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
381 	req = (struct hclge_config_mac_speed_dup_cmd *)desc.data;
412 	struct hclge_desc desc;
423 		ret = hclge_dbg_cmd_send(hdev, &desc, qset_id, 1,
428 		req.bitmap = (u8)le32_to_cpu(desc.data[1]);
443 	struct hclge_desc desc;
454 		ret = hclge_dbg_cmd_send(hdev, &desc, pri_id, 1,
459 		req.bitmap = (u8)le32_to_cpu(desc.data[1]);
473 	struct hclge_desc desc;
480 		ret = hclge_dbg_cmd_send(hdev, &desc, pg_id, 1,
485 		req.bitmap = (u8)le32_to_cpu(desc.data[1]);
498 	struct hclge_desc desc;
505 		ret = hclge_dbg_cmd_send(hdev, &desc, nq_id, 1,
511 				  nq_id, le32_to_cpu(desc.data[1]));
513 		ret = hclge_dbg_cmd_send(hdev, &desc, nq_id, 1,
520 				  le32_to_cpu(desc.data[1]));
530 	struct hclge_desc desc;
534 	ret = hclge_dbg_cmd_send(hdev, &desc, port_id, 1,
539 	req.bitmap = (u8)le32_to_cpu(desc.data[1]);
552 	struct hclge_desc desc[2];
556 	ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1,
562 			  le32_to_cpu(desc[0].data[1]));
564 			  le32_to_cpu(desc[0].data[2]));
566 	ret = hclge_dbg_cmd_send(hdev, desc, port_id, 2,
572 			  le32_to_cpu(desc[0].data[1]));
574 			  le32_to_cpu(desc[0].data[2]));
577 			  le32_to_cpu(desc[0].data[3]));
580 			  le32_to_cpu(desc[0].data[4]));
582 			  le32_to_cpu(desc[0].data[5]));
584 			  le32_to_cpu(desc[1].data[0]));
586 			  le32_to_cpu(desc[1].data[1]));
591 	ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1,
597 			  le32_to_cpu(desc[0].data[1]));
599 			  le32_to_cpu(desc[0].data[2]));
601 			  le32_to_cpu(desc[0].data[3]));
603 			  le32_to_cpu(desc[0].data[4]));
606 			  le32_to_cpu(desc[0].data[5]));
666 	struct hclge_desc desc;
678 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_ETS_TC_WEIGHT, true);
679 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
686 	ets_weight = (struct hclge_ets_tc_weight_cmd *)desc.data;
843 	struct hclge_desc desc;
852 	map = (struct hclge_bp_to_qs_map_cmd *)desc.data;
854 		hclge_cmd_setup_basic_desc(&desc,
859 		ret = hclge_cmd_send(&hdev->hw, &desc, 1);
933 	struct hclge_desc desc;
937 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_NODES, true);
938 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
945 	nodes = (struct hclge_tm_nodes_cmd *)desc.data;
1126 	struct hclge_desc desc;
1130 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CFG_MAC_PARA, true);
1131 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1138 	pause_param = (struct hclge_cfg_pause_param_cmd *)desc.data;
1155 	struct hclge_desc desc;
1161 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PRI_TO_TC_MAPPING, true);
1162 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1169 	pri_map = (struct hclge_qos_pri_map_cmd *)desc.data;
1189 	struct hclge_desc desc[HCLGE_DSCP_MAP_TC_BD_NUM];
1190 	u8 *req0 = (u8 *)desc[0].data;
1191 	u8 *req1 = (u8 *)desc[1].data;
1202 	hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_QOS_MAP, true);
1203 	desc[0].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
1204 	hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_QOS_MAP, true);
1205 	ret = hclge_cmd_send(&hdev->hw, desc, HCLGE_DSCP_MAP_TC_BD_NUM);
1240 	struct hclge_desc desc;
1244 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TX_BUFF_ALLOC, true);
1245 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1252 	tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc.data;
1265 	struct hclge_desc desc;
1269 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_PRIV_BUFF_ALLOC, true);
1270 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1279 	rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc.data;
1295 	struct hclge_desc desc;
1299 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_COM_WL_ALLOC, true);
1300 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1307 	rx_com_wl = (struct hclge_rx_com_wl *)desc.data;
1321 	struct hclge_desc desc;
1325 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_GBL_PKT_CNT, true);
1326 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1333 	rx_packet_cnt = (struct hclge_rx_com_wl *)desc.data;
1346 	struct hclge_desc desc[2];
1350 	hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_PRIV_WL_ALLOC, true);
1351 	desc[0].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
1352 	hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_RX_PRIV_WL_ALLOC, true);
1353 	ret = hclge_cmd_send(&hdev->hw, desc, 2);
1360 	rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data;
1367 	rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[1].data;
1382 	struct hclge_desc desc[2];
1386 	hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_COM_THRD_ALLOC, true);
1387 	desc[0].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
1388 	hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_RX_COM_THRD_ALLOC, true);
1389 	ret = hclge_cmd_send(&hdev->hw, desc, 2);
1397 	rx_com_thrd = (struct hclge_rx_com_thrd *)desc[0].data;
1404 	rx_com_thrd = (struct hclge_rx_com_thrd *)desc[1].data;
1461 	struct hclge_desc desc;
1473 		hclge_cmd_setup_basic_desc(&desc, HCLGE_MAC_ETHERTYPE_IDX_RD,
1475 		req0 = (struct hclge_mac_ethertype_idx_rd_cmd *)&desc.data;
1478 		ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1526 	struct hclge_desc desc[3];
1531 	hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_FD_TCAM_OP, true);
1532 	desc[0].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
1533 	hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_FD_TCAM_OP, true);
1534 	desc[1].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT);
1535 	hclge_cmd_setup_basic_desc(&desc[2], HCLGE_OPC_FD_TCAM_OP, true);
1537 	req1 = (struct hclge_fd_tcam_config_1_cmd *)desc[0].data;
1538 	req2 = (struct hclge_fd_tcam_config_2_cmd *)desc[1].data;
1539 	req3 = (struct hclge_fd_tcam_config_3_cmd *)desc[2].data;
1545 	ret = hclge_cmd_send(&hdev->hw, desc, 3);
1664 	struct hclge_desc desc;
1677 		hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_FD_CNT_OP, true);
1678 		req = (struct hclge_fd_ad_cnt_read_cmd *)desc.data;
1680 		ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1810 	struct hclge_desc desc;
1814 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_IMP_STATS_BD, true);
1816 	req = (struct hclge_get_imp_bd_cmd *)desc.data;
1817 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1854 static void hclge_ncl_config_data_print(struct hclge_desc *desc, int *index,
1869 					  le32_to_cpu(desc[i].data[j]));
1885 	struct hclge_desc desc[HCLGE_CMD_NCL_CONFIG_BD_NUM];
1900 		ret = hclge_dbg_cmd_send(hdev, desc, data0, bd_num,
1905 		hclge_ncl_config_data_print(desc, &index, buf, len, &pos);
1916 	struct hclge_desc desc;
1921 	req_app = (struct hclge_config_mac_mode_cmd *)desc.data;
1922 	req_common = (struct hclge_common_lb_cmd *)desc.data;
1927 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true);
1928 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1940 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_COMMON_LOOPBACK, true);
1941 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
2084 	struct hclge_desc desc;
2089 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_PORT_RX_CFG, true);
2091 	req = (struct hclge_vport_vtag_rx_cfg_cmd *)desc.data;
2096 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
2119 	struct hclge_desc desc;
2124 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_PORT_TX_CFG, true);
2125 	req = (struct hclge_vport_vtag_tx_cfg_cmd *)desc.data;
2130 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
2154 					    struct hclge_desc *desc)
2159 	hclge_cmd_setup_basic_desc(desc, HCLGE_OPC_VLAN_FILTER_CTRL, true);
2160 	req = (struct hclge_vlan_filter_ctrl_cmd *)desc->data;
2164 	ret = hclge_cmd_send(&hdev->hw, desc, 1);
2177 	struct hclge_desc desc;
2180 	ret = hclge_get_vlan_filter_config_cmd(hdev, vlan_type, vf_id, &desc);
2184 	req = (struct hclge_vlan_filter_ctrl_cmd *)desc.data;
2194 	struct hclge_desc desc;
2200 	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PORT_VLAN_BYPASS, true);
2201 	req = (struct hclge_port_vlan_filter_bypass_cmd *)desc.data;
2204 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);