hisilicon/hns/hns_dsaf_gmac.c

63 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
67 		dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 1);
71 		dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 0);
72 		dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 1);
78 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
82 		dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 0);
86 		dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 1);
87 		dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 0);
98 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
101 	porten = dsaf_read_dev(drv, GMAC_PORT_EN_REG);
108 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
110 		= (struct dsaf_device *)dev_get_drvdata(drv->dev);
112 	u32 mac_id = drv->mac_id;
119 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
121 	dsaf_set_dev_field(drv, GMAC_FC_TX_TIMER_REG, GMAC_FC_TX_TIMER_M,
127 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
129 	*newval = dsaf_get_dev_field(drv, GMAC_FC_TX_TIMER_REG,
135 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
137 	dsaf_set_dev_field(drv, GMAC_MAX_FRM_SIZE_REG, GMAC_MAX_FRM_SIZE_M,
140 	dsaf_set_dev_field(drv, GAMC_RX_MAX_FRAME, GMAC_MAX_FRM_SIZE_M,
147 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
149 	tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
152 	dsaf_write_dev(drv, GMAC_TRANSMIT_CONTROL_REG, tx_ctrl);
157 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
159 	dsaf_set_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG,
166 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
168 	tx_loop_pkt_pri = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG);
171 	dsaf_write_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG, tx_loop_pkt_pri);
177 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
180 		drv, GMAC_DUPLEX_TYPE_REG, GMAC_DUPLEX_TYPE_B);
185 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
188 		drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S);
196 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
199 		drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S);
201 	tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
202 	recv_ctrl = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG);
205 		dsaf_get_dev_field(drv, GMAC_MAX_FRM_SIZE_REG,
208 		dsaf_get_dev_field(drv, GMAC_SHORT_RUNTS_THR_REG,
226 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
228 	pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
231 	dsaf_write_dev(drv, GMAC_PAUSE_EN_REG, pause_en);
238 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
240 	pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
249 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
250 	struct hns_mac_cb *mac_cb = drv->mac_cb;
259 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
261 	dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG,
267 			drv, GMAC_PORT_MODE_REG,
272 			drv, GMAC_PORT_MODE_REG,
277 			drv, GMAC_PORT_MODE_REG,
281 		dev_err(drv->dev,
283 			speed, drv->mac_id);
292 	struct mac_driver *drv = mac_drv;
294 	dsaf_set_dev_bit(drv, GMAC_REC_FILT_CONTROL_REG,
296 	dsaf_set_dev_bit(drv, GMAC_STATION_ADDR_HIGH_2_REG,
302 	struct mac_driver *drv = mac_drv;
304 	if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
310 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
316 		val = dsaf_read_dev(drv, GMAC_FIFO_STATE_REG);
324 		dev_err(drv->dev,
325 			"hns ge %d fifo was not idle.\n", drv->mac_id);
335 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
337 		= (struct dsaf_device *)dev_get_drvdata(drv->dev);
339 	port = drv->mac_id;
347 	if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
352 	dsaf_set_dev_bit(drv, GMAC_MODE_CHANGE_EN_REG,
358 	dsaf_set_dev_field(drv, GMAC_TX_WATER_LINE_REG, GMAC_TX_WATER_LINE_MASK,
365 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
367 	hw_stats = &drv->mac_cb->hw_stats;
371 		+= dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG);
373 		+= dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG);
374 	hw_stats->rx_uc_pkts += dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG);
375 	hw_stats->rx_mc_pkts += dsaf_read_dev(drv, GMAC_RX_MC_PKTS_REG);
376 	hw_stats->rx_bc_pkts += dsaf_read_dev(drv, GMAC_RX_BC_PKTS_REG);
378 		+= dsaf_read_dev(drv, GMAC_RX_PKTS_64OCTETS_REG);
380 		+= dsaf_read_dev(drv, GMAC_RX_PKTS_65TO127OCTETS_REG);
382 		+= dsaf_read_dev(drv, GMAC_RX_PKTS_128TO255OCTETS_REG);
384 		+= dsaf_read_dev(drv, GMAC_RX_PKTS_255TO511OCTETS_REG);
386 		+= dsaf_read_dev(drv, GMAC_RX_PKTS_512TO1023OCTETS_REG);
388 		+= dsaf_read_dev(drv, GMAC_RX_PKTS_1024TO1518OCTETS_REG);
390 		+= dsaf_read_dev(drv, GMAC_RX_PKTS_1519TOMAXOCTETS_REG);
391 	hw_stats->rx_fcs_err += dsaf_read_dev(drv, GMAC_RX_FCS_ERRORS_REG);
392 	hw_stats->rx_vlan_pkts += dsaf_read_dev(drv, GMAC_RX_TAGGED_REG);
393 	hw_stats->rx_data_err += dsaf_read_dev(drv, GMAC_RX_DATA_ERR_REG);
395 		+= dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG);
397 		+= dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG);
399 		+= dsaf_read_dev(drv, GMAC_RX_JABBER_ERRORS_REG);
401 		+= dsaf_read_dev(drv, GMAC_RX_PAUSE_MACCTRL_FRAM_REG);
403 		+= dsaf_read_dev(drv, GMAC_RX_UNKNOWN_MACCTRL_FRAM_REG);
405 		+= dsaf_read_dev(drv, GMAC_RX_VERY_LONG_ERR_CNT_REG);
407 		+= dsaf_read_dev(drv, GMAC_RX_RUNT_ERR_CNT_REG);
409 		+= dsaf_read_dev(drv, GMAC_RX_SHORT_ERR_CNT_REG);
411 		+= dsaf_read_dev(drv, GMAC_RX_FILT_PKT_CNT_REG);
413 		+= dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_FILT_REG);
415 		+= dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG);
417 		+= dsaf_read_dev(drv, GMAC_RX_LENGTHFIELD_ERR_CNT_REG);
419 		+= dsaf_read_dev(drv, GMAC_RX_FAIL_COMMA_CNT_REG);
423 		+= dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_OK_REG);
425 		+= dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_BAD_REG);
426 	hw_stats->tx_uc_pkts += dsaf_read_dev(drv, GMAC_TX_UC_PKTS_REG);
427 	hw_stats->tx_mc_pkts += dsaf_read_dev(drv, GMAC_TX_MC_PKTS_REG);
428 	hw_stats->tx_bc_pkts += dsaf_read_dev(drv, GMAC_TX_BC_PKTS_REG);
430 		+= dsaf_read_dev(drv, GMAC_TX_PKTS_64OCTETS_REG);
432 		+= dsaf_read_dev(drv, GMAC_TX_PKTS_65TO127OCTETS_REG);
434 		+= dsaf_read_dev(drv, GMAC_TX_PKTS_128TO255OCTETS_REG);
436 		+= dsaf_read_dev(drv, GMAC_TX_PKTS_255TO511OCTETS_REG);
438 		+= dsaf_read_dev(drv, GMAC_TX_PKTS_512TO1023OCTETS_REG);
440 		+= dsaf_read_dev(drv, GMAC_TX_PKTS_1024TO1518OCTETS_REG);
442 		+= dsaf_read_dev(drv, GMAC_TX_PKTS_1519TOMAXOCTETS_REG);
444 		+= dsaf_read_dev(drv, GMAC_TX_EXCESSIVE_LENGTH_DROP_REG);
446 		+= dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG);
447 	hw_stats->tx_vlan += dsaf_read_dev(drv, GMAC_TX_TAGGED_REG);
448 	hw_stats->tx_crc_err += dsaf_read_dev(drv, GMAC_TX_CRC_ERROR_REG);
450 		+= dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
455 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
462 	u32 val = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
465 	dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val);
466 	dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG,
473 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
477 		dsaf_set_dev_bit(drv, GMAC_LOOP_REG, GMAC_LP_REG_CF2MI_LP_EN_B,
481 		dev_err(drv->dev, "loop_mode error\n");
535 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
537 	*enable = dsaf_get_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG,
543 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
545 	*link_stat = dsaf_get_dev_bit(drv, GMAC_AN_NEG_STATE_REG,
553 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
556 	regs[0] = dsaf_read_dev(drv, GMAC_DUPLEX_TYPE_REG);
557 	regs[1] = dsaf_read_dev(drv, GMAC_FD_FC_TYPE_REG);
558 	regs[2] = dsaf_read_dev(drv, GMAC_FC_TX_TIMER_REG);
559 	regs[3] = dsaf_read_dev(drv, GMAC_FD_FC_ADDR_LOW_REG);
560 	regs[4] = dsaf_read_dev(drv, GMAC_FD_FC_ADDR_HIGH_REG);
561 	regs[5] = dsaf_read_dev(drv, GMAC_IPG_TX_TIMER_REG);
562 	regs[6] = dsaf_read_dev(drv, GMAC_PAUSE_THR_REG);
563 	regs[7] = dsaf_read_dev(drv, GMAC_MAX_FRM_SIZE_REG);
564 	regs[8] = dsaf_read_dev(drv, GMAC_PORT_MODE_REG);
565 	regs[9] = dsaf_read_dev(drv, GMAC_PORT_EN_REG);
566 	regs[10] = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
567 	regs[11] = dsaf_read_dev(drv, GMAC_SHORT_RUNTS_THR_REG);
568 	regs[12] = dsaf_read_dev(drv, GMAC_AN_NEG_STATE_REG);
569 	regs[13] = dsaf_read_dev(drv, GMAC_TX_LOCAL_PAGE_REG);
570 	regs[14] = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
571 	regs[15] = dsaf_read_dev(drv, GMAC_REC_FILT_CONTROL_REG);
572 	regs[16] = dsaf_read_dev(drv, GMAC_PTP_CONFIG_REG);
575 	regs[17] = dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG);
576 	regs[18] = dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG);
577 	regs[19] = dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG);
578 	regs[20] = dsaf_read_dev(drv, GMAC_RX_MC_PKTS_REG);
579 	regs[21] = dsaf_read_dev(drv, GMAC_RX_BC_PKTS_REG);
580 	regs[22] = dsaf_read_dev(drv, GMAC_RX_PKTS_64OCTETS_REG);
581 	regs[23] = dsaf_read_dev(drv, GMAC_RX_PKTS_65TO127OCTETS_REG);
582 	regs[24] = dsaf_read_dev(drv, GMAC_RX_PKTS_128TO255OCTETS_REG);
583 	regs[25] = dsaf_read_dev(drv, GMAC_RX_PKTS_255TO511OCTETS_REG);
584 	regs[26] = dsaf_read_dev(drv, GMAC_RX_PKTS_512TO1023OCTETS_REG);
585 	regs[27] = dsaf_read_dev(drv, GMAC_RX_PKTS_1024TO1518OCTETS_REG);
586 	regs[28] = dsaf_read_dev(drv, GMAC_RX_PKTS_1519TOMAXOCTETS_REG);
587 	regs[29] = dsaf_read_dev(drv, GMAC_RX_FCS_ERRORS_REG);
588 	regs[30] = dsaf_read_dev(drv, GMAC_RX_TAGGED_REG);
589 	regs[31] = dsaf_read_dev(drv, GMAC_RX_DATA_ERR_REG);
590 	regs[32] = dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG);
591 	regs[33] = dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG);
592 	regs[34] = dsaf_read_dev(drv, GMAC_RX_JABBER_ERRORS_REG);
593 	regs[35] = dsaf_read_dev(drv, GMAC_RX_PAUSE_MACCTRL_FRAM_REG);
594 	regs[36] = dsaf_read_dev(drv, GMAC_RX_UNKNOWN_MACCTRL_FRAM_REG);
595 	regs[37] = dsaf_read_dev(drv, GMAC_RX_VERY_LONG_ERR_CNT_REG);
596 	regs[38] = dsaf_read_dev(drv, GMAC_RX_RUNT_ERR_CNT_REG);
597 	regs[39] = dsaf_read_dev(drv, GMAC_RX_SHORT_ERR_CNT_REG);
598 	regs[40] = dsaf_read_dev(drv, GMAC_RX_FILT_PKT_CNT_REG);
599 	regs[41] = dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_FILT_REG);
602 	regs[42] = dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_OK_REG);
603 	regs[43] = dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_BAD_REG);
604 	regs[44] = dsaf_read_dev(drv, GMAC_TX_UC_PKTS_REG);
605 	regs[45] = dsaf_read_dev(drv, GMAC_TX_MC_PKTS_REG);
606 	regs[46] = dsaf_read_dev(drv, GMAC_TX_BC_PKTS_REG);
607 	regs[47] = dsaf_read_dev(drv, GMAC_TX_PKTS_64OCTETS_REG);
608 	regs[48] = dsaf_read_dev(drv, GMAC_TX_PKTS_65TO127OCTETS_REG);
609 	regs[49] = dsaf_read_dev(drv, GMAC_TX_PKTS_128TO255OCTETS_REG);
610 	regs[50] = dsaf_read_dev(drv, GMAC_TX_PKTS_255TO511OCTETS_REG);
611 	regs[51] = dsaf_read_dev(drv, GMAC_TX_PKTS_512TO1023OCTETS_REG);
612 	regs[52] = dsaf_read_dev(drv, GMAC_TX_PKTS_1024TO1518OCTETS_REG);
613 	regs[53] = dsaf_read_dev(drv, GMAC_TX_PKTS_1519TOMAXOCTETS_REG);
614 	regs[54] = dsaf_read_dev(drv, GMAC_TX_EXCESSIVE_LENGTH_DROP_REG);
615 	regs[55] = dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG);
616 	regs[56] = dsaf_read_dev(drv, GMAC_TX_TAGGED_REG);
617 	regs[57] = dsaf_read_dev(drv, GMAC_TX_CRC_ERROR_REG);
618 	regs[58] = dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
620 	regs[59] = dsaf_read_dev(drv, GAMC_RX_MAX_FRAME);
621 	regs[60] = dsaf_read_dev(drv, GMAC_LINE_LOOP_BACK_REG);
622 	regs[61] = dsaf_read_dev(drv, GMAC_CF_CRC_STRIP_REG);
623 	regs[62] = dsaf_read_dev(drv, GMAC_MODE_CHANGE_EN_REG);
624 	regs[63] = dsaf_read_dev(drv, GMAC_SIXTEEN_BIT_CNTR_REG);
625 	regs[64] = dsaf_read_dev(drv, GMAC_LD_LINK_COUNTER_REG);
626 	regs[65] = dsaf_read_dev(drv, GMAC_LOOP_REG);
627 	regs[66] = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG);
628 	regs[67] = dsaf_read_dev(drv, GMAC_VLAN_CODE_REG);
629 	regs[68] = dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG);
630 	regs[69] = dsaf_read_dev(drv, GMAC_RX_LENGTHFIELD_ERR_CNT_REG);
631 	regs[70] = dsaf_read_dev(drv, GMAC_RX_FAIL_COMMA_CNT_REG);
633 	regs[71] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_0_REG);
634 	regs[72] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_0_REG);
635 	regs[73] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_1_REG);
636 	regs[74] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_1_REG);
637 	regs[75] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_2_REG);
638 	regs[76] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
639 	regs[77] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_3_REG);
640 	regs[78] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_3_REG);
641 	regs[79] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_4_REG);
642 	regs[80] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_4_REG);
643 	regs[81] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_5_REG);
644 	regs[82] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_5_REG);
645 	regs[83] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_MSK_0_REG);
646 	regs[84] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_MSK_0_REG);
647 	regs[85] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_MSK_1_REG);
648 	regs[86] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_MSK_1_REG);
649 	regs[87] = dsaf_read_dev(drv, GMAC_MAC_SKIP_LEN_REG);
650 	regs[88] = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG);
661 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
664 	hw_stats = &drv->mac_cb->hw_stats;