cisco/enic/vnic_wq.c

18 static int vnic_wq_alloc_bufs(struct vnic_wq *wq)
21 	unsigned int i, j, count = wq->ring.desc_count;
25 		wq->bufs[i] = kzalloc(VNIC_WQ_BUF_BLK_SZ(count), GFP_KERNEL);
26 		if (!wq->bufs[i])
31 		buf = wq->bufs[i];
34 			buf->desc = (u8 *)wq->ring.descs +
35 				wq->ring.desc_size * buf->index;
37 				buf->next = wq->bufs[0];
41 				buf->next = wq->bufs[i + 1];
51 	wq->to_use = wq->to_clean = wq->bufs[0];
56 void vnic_wq_free(struct vnic_wq *wq)
61 	vdev = wq->vdev;
63 	vnic_dev_free_desc_ring(vdev, &wq->ring);
66 		if (wq->bufs[i]) {
67 			kfree(wq->bufs[i]);
68 			wq->bufs[i] = NULL;
72 	wq->ctrl = NULL;
75 int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index,
80 	wq->index = index;
81 	wq->vdev = vdev;
83 	wq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_WQ, index);
84 	if (!wq->ctrl) {
89 	vnic_wq_disable(wq);
91 	err = vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size);
95 	err = vnic_wq_alloc_bufs(wq);
97 		vnic_wq_free(wq);
104 int enic_wq_devcmd2_alloc(struct vnic_dev *vdev, struct vnic_wq *wq,
109 	wq->index = 0;
110 	wq->vdev = vdev;
112 	wq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
113 	if (!wq->ctrl)
115 	vnic_wq_disable(wq);
116 	err = vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size);
121 void enic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index,
127 	unsigned int count = wq->ring.desc_count;
129 	paddr = (u64)wq->ring.base_addr | VNIC_PADDR_TARGET;
130 	writeq(paddr, &wq->ctrl->ring_base);
131 	iowrite32(count, &wq->ctrl->ring_size);
132 	iowrite32(fetch_index, &wq->ctrl->fetch_index);
133 	iowrite32(posted_index, &wq->ctrl->posted_index);
134 	iowrite32(cq_index, &wq->ctrl->cq_index);
135 	iowrite32(error_interrupt_enable, &wq->ctrl->error_interrupt_enable);
136 	iowrite32(error_interrupt_offset, &wq->ctrl->error_interrupt_offset);
137 	iowrite32(0, &wq->ctrl->error_status);
139 	wq->to_use = wq->to_clean =
140 		&wq->bufs[fetch_index / VNIC_WQ_BUF_BLK_ENTRIES(count)]
144 void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,
148 	enic_wq_init_start(wq, cq_index, 0, 0,
153 unsigned int vnic_wq_error_status(struct vnic_wq *wq)
155 	return ioread32(&wq->ctrl->error_status);
158 void vnic_wq_enable(struct vnic_wq *wq)
160 	iowrite32(1, &wq->ctrl->enable);
163 int vnic_wq_disable(struct vnic_wq *wq)
166 	struct vnic_dev *vdev = wq->vdev;
168 	iowrite32(0, &wq->ctrl->enable);
172 		if (!(ioread32(&wq->ctrl->running)))
177 	vdev_neterr(vdev, "Failed to disable WQ[%d]\n", wq->index);
182 void vnic_wq_clean(struct vnic_wq *wq,
183 	void (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf))
187 	buf = wq->to_clean;
189 	while (vnic_wq_desc_used(wq) > 0) {
191 		(*buf_clean)(wq, buf);
193 		buf = wq->to_clean = buf->next;
194 		wq->ring.desc_avail++;
197 	wq->to_use = wq->to_clean = wq->bufs[0];
199 	iowrite32(0, &wq->ctrl->fetch_index);
200 	iowrite32(0, &wq->ctrl->posted_index);
201 	iowrite32(0, &wq->ctrl->error_status);
203 	vnic_dev_clear_desc_ring(&wq->ring);