chelsio/cxgb3/t3_hw.c

199 	u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1;
648 	struct t3_vpd vpd;
661 	ret = pci_read_vpd(adapter->pdev, addr, sizeof(vpd), &vpd);
665 	ret = vpdstrtouint(vpd.cclk_data, vpd.cclk_len, 10, &p->cclk);
668 	ret = vpdstrtouint(vpd.mclk_data, vpd.mclk_len, 10, &p->mclk);
671 	ret = vpdstrtouint(vpd.uclk_data, vpd.uclk_len, 10, &p->uclk);
674 	ret = vpdstrtouint(vpd.mdc_data, vpd.mdc_len, 10, &p->mdc);
677 	ret = vpdstrtouint(vpd.mt_data, vpd.mt_len, 10, &p->mem_timing);
680 	memcpy(p->sn, vpd.sn_data, SERNUM_LEN);
683 	if (adapter->params.rev == 0 && !vpd.port0_data[0]) {
687 		p->port_type[0] = hex_to_bin(vpd.port0_data[0]);
688 		p->port_type[1] = hex_to_bin(vpd.port1_data[0]);
689 		ret = vpdstrtou16(vpd.xaui0cfg_data, vpd.xaui0cfg_len, 16,
693 		ret = vpdstrtou16(vpd.xaui1cfg_data, vpd.xaui1cfg_len, 16,
699 	ret = hex2bin(p->eth_base, vpd.na_data, 6);
2975 	unsigned int clk = adap->params.vpd.cclk * 1000;
3016 		tp_set_timers(adap, adap->params.vpd.cclk * 1000);
3312 	const struct vpd_params *vpd = &adapter->params.vpd;
3319 	if (vpd->mclk) {
3322 		if (mc7_init(&adapter->pmrx, vpd->mclk, vpd->mem_timing) ||
3323 		    mc7_init(&adapter->pmtx, vpd->mclk, vpd->mem_timing) ||
3324 		    mc7_init(&adapter->cm, vpd->mclk, vpd->mem_timing) ||
3364 	t3_write_reg(adapter, A_CIM_HOST_ACC_DATA, vpd->uclk | fw_params);
3482 	if (devid == 0x37 && !adapter->params.vpd.xauicfg[1])
3502 		     V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1));
3618 	ret = get_vpd_params(adapter, &adapter->params.vpd);
3627 	if (adapter->params.vpd.mclk) {
3673 		while (!adapter->params.vpd.port_type[++j])
3676 		pti = &port_types[adapter->params.vpd.port_type[j]];
3679 				 adapter->params.vpd.port_type[j]);
3695 		memcpy(hw_addr, adapter->params.vpd.eth_base, 5);
3696 		hw_addr[5] = adapter->params.vpd.eth_base[5] + i;
3736 		while (!adapter->params.vpd.port_type[++j])
3739 		pti = &port_types[adapter->params.vpd.port_type[j]];