chelsio/cxgb3/cxgb3_main.c

391 		for (i = 0; i < pi->nqsets; i++, msi_idx++) {
404 		int nqsets = adap2pinfo(adap, i)->nqsets;
406 		for (j = 0; j < nqsets; ++j) {
432 			n += adap2pinfo(adapter, i)->nqsets;
570 	unsigned int nq0 = adap2pinfo(adap, 0)->nqsets;
571 	unsigned int nq1 = adap->port[1] ? adap2pinfo(adap, 1)->nqsets : 1;
665 		for (j = 0; j < pi->nqsets; ++j, ++qset_idx) {
978 		for (j = 0; j < pi->nqsets; ++j) {
1169 	for (i = p->first_qset; i < p->first_qset + p->nqsets; i++) {
1434 	netif_set_real_num_tx_queues(dev, pi->nqsets);
1435 	err = netif_set_real_num_rx_queues(dev, pi->nqsets);
1656 	for (i = p->first_qset; i < p->first_qset + p->nqsets; ++i)
1991 	for (i = 0; i < pi->nqsets; ++i, ++q) {
2015 	for (i = 0; i < pi->nqsets; i++) {
2154 		int nqsets = pi->nqsets;
2192 				nqsets += pi->first_qset + pi->nqsets;
2198 		if (t.qset_idx > q1 + nqsets - 1)
2255 		int nqsets = pi->nqsets;
2269 				nqsets = pi->first_qset + pi->nqsets;
2273 		if (t.qset_idx >= nqsets)
2275 		t.qset_idx = array_index_nospec(t.qset_idx, nqsets);
2317 				other_qsets += adap2pinfo(adapter, i)->nqsets;
2322 		pi->nqsets = edata.val;
2328 				first_qset += pi->nqsets;
2338 		edata.val = pi->nqsets;
2619 	for (qidx = pi->first_qset; qidx < pi->first_qset + pi->nqsets; qidx++) {
3088 	int nqsets = adap->msix_nvectors - 1;
3092 		    (hwports * nqsets > SGE_QSETS ||
3093 		     num_cpus >= nqsets / hwports))
3094 			nqsets /= hwports;
3095 		if (nqsets > num_cpus)
3096 			nqsets = num_cpus;
3097 		if (nqsets < 1 || hwports == 4)
3098 			nqsets = 1;
3100 		nqsets = 1;
3107 		pi->nqsets = nqsets;
3108 		j = pi->first_qset + nqsets;
3111 			 "Port %d using %d queue sets.\n", i, nqsets);