Lines Matching refs:reg_base
47 void __iomem *reg_base;
70 cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
72 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET);
75 cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
77 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET);
84 cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL);
87 writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL);
92 cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
94 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET);
95 readq_relaxed(xcv->reg_base + XCV_RESET);
100 cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
102 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET);
104 cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
106 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET);
127 cfg = readq_relaxed(xcv->reg_base + XCV_CTL);
130 writeq_relaxed(cfg, xcv->reg_base + XCV_CTL);
133 cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
135 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET);
138 cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
140 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET);
143 writeq_relaxed(0x01, xcv->reg_base + XCV_BATCH_CRD_RET);
146 cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
148 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET);
149 readq_relaxed(xcv->reg_base + XCV_RESET);
179 xcv->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
180 if (!xcv->reg_base) {