Lines Matching refs:u64
173 u64 cqe_type:4; /* W0 */
174 u64 stdn_fault:1;
175 u64 rsvd0:1;
176 u64 rq_qs:7;
177 u64 rq_idx:3;
178 u64 rsvd1:12;
179 u64 rss_alg:4;
180 u64 rsvd2:4;
181 u64 rb_cnt:4;
182 u64 vlan_found:1;
183 u64 vlan_stripped:1;
184 u64 vlan2_found:1;
185 u64 vlan2_stripped:1;
186 u64 l4_type:4;
187 u64 l3_type:4;
188 u64 l2_present:1;
189 u64 err_level:3;
190 u64 err_opcode:8;
192 u64 pkt_len:16; /* W1 */
193 u64 l2_ptr:8;
194 u64 l3_ptr:8;
195 u64 l4_ptr:8;
196 u64 cq_pkt_len:8;
197 u64 align_pad:3;
198 u64 rsvd3:1;
199 u64 chan:12;
201 u64 rss_tag:32; /* W2 */
202 u64 vlan_tci:16;
203 u64 vlan_ptr:8;
204 u64 vlan2_ptr:8;
206 u64 rb3_sz:16; /* W3 */
207 u64 rb2_sz:16;
208 u64 rb1_sz:16;
209 u64 rb0_sz:16;
211 u64 rb7_sz:16; /* W4 */
212 u64 rb6_sz:16;
213 u64 rb5_sz:16;
214 u64 rb4_sz:16;
216 u64 rb11_sz:16; /* W5 */
217 u64 rb10_sz:16;
218 u64 rb9_sz:16;
219 u64 rb8_sz:16;
221 u64 err_opcode:8;
222 u64 err_level:3;
223 u64 l2_present:1;
224 u64 l3_type:4;
225 u64 l4_type:4;
226 u64 vlan2_stripped:1;
227 u64 vlan2_found:1;
228 u64 vlan_stripped:1;
229 u64 vlan_found:1;
230 u64 rb_cnt:4;
231 u64 rsvd2:4;
232 u64 rss_alg:4;
233 u64 rsvd1:12;
234 u64 rq_idx:3;
235 u64 rq_qs:7;
236 u64 rsvd0:1;
237 u64 stdn_fault:1;
238 u64 cqe_type:4; /* W0 */
239 u64 chan:12;
240 u64 rsvd3:1;
241 u64 align_pad:3;
242 u64 cq_pkt_len:8;
243 u64 l4_ptr:8;
244 u64 l3_ptr:8;
245 u64 l2_ptr:8;
246 u64 pkt_len:16; /* W1 */
247 u64 vlan2_ptr:8;
248 u64 vlan_ptr:8;
249 u64 vlan_tci:16;
250 u64 rss_tag:32; /* W2 */
251 u64 rb0_sz:16;
252 u64 rb1_sz:16;
253 u64 rb2_sz:16;
254 u64 rb3_sz:16; /* W3 */
255 u64 rb4_sz:16;
256 u64 rb5_sz:16;
257 u64 rb6_sz:16;
258 u64 rb7_sz:16; /* W4 */
259 u64 rb8_sz:16;
260 u64 rb9_sz:16;
261 u64 rb10_sz:16;
262 u64 rb11_sz:16; /* W5 */
264 u64 rb0_ptr:64;
265 u64 rb1_ptr:64;
266 u64 rb2_ptr:64;
267 u64 rb3_ptr:64;
268 u64 rb4_ptr:64;
269 u64 rb5_ptr:64;
270 u64 rb6_ptr:64;
271 u64 rb7_ptr:64;
272 u64 rb8_ptr:64;
273 u64 rb9_ptr:64;
274 u64 rb10_ptr:64;
275 u64 rb11_ptr:64;
280 u64 cqe_type:4; /* W0 */
281 u64 rsvd0:60;
283 u64 rsvd1:4; /* W1 */
284 u64 partial_first:1;
285 u64 rsvd2:27;
286 u64 rbdr_bytes:8;
287 u64 rsvd3:24;
289 u64 rsvd0:60;
290 u64 cqe_type:4;
292 u64 rsvd3:24;
293 u64 rbdr_bytes:8;
294 u64 rsvd2:27;
295 u64 partial_first:1;
296 u64 rsvd1:4;
302 u64 cqe_type:4; /* W0 */
303 u64 rsvd0:52;
304 u64 cq_tcp_status:8;
306 u64 rsvd1:32; /* W1 */
307 u64 tcp_cntx_bytes:8;
308 u64 rsvd2:8;
309 u64 tcp_err_bytes:16;
311 u64 cq_tcp_status:8;
312 u64 rsvd0:52;
313 u64 cqe_type:4; /* W0 */
315 u64 tcp_err_bytes:16;
316 u64 rsvd2:8;
317 u64 tcp_cntx_bytes:8;
318 u64 rsvd1:32; /* W1 */
324 u64 cqe_type:4; /* W0 */
325 u64 rsvd0:4;
326 u64 sqe_ptr:16;
327 u64 rsvd1:4;
328 u64 rsvd2:10;
329 u64 sq_qs:7;
330 u64 sq_idx:3;
331 u64 rsvd3:8;
332 u64 send_status:8;
334 u64 ptp_timestamp:64; /* W1 */
336 u64 send_status:8;
337 u64 rsvd3:8;
338 u64 sq_idx:3;
339 u64 sq_qs:7;
340 u64 rsvd2:10;
341 u64 rsvd1:4;
342 u64 sqe_ptr:16;
343 u64 rsvd0:4;
344 u64 cqe_type:4; /* W0 */
346 u64 ptp_timestamp:64; /* W1 */
351 u64 u[64];
359 u64 buf_addr;
365 u64 tcp_pkt_cnt:12;
366 u64 rsvd1:4;
367 u64 align_hdr_bytes:4;
368 u64 align_ptr_bytes:4;
369 u64 ptr_bytes:16;
370 u64 rsvd2:24;
371 u64 cqe_type:4;
372 u64 rsvd0:54;
373 u64 tcp_end_reason:2;
374 u64 tcp_status:4;
376 u64 tcp_status:4;
377 u64 tcp_end_reason:2;
378 u64 rsvd0:54;
379 u64 cqe_type:4;
380 u64 rsvd2:24;
381 u64 ptr_bytes:16;
382 u64 align_ptr_bytes:4;
383 u64 align_hdr_bytes:4;
384 u64 rsvd1:4;
385 u64 tcp_pkt_cnt:12;
391 u64 opaque:32;
392 u64 rss_flow:8;
393 u64 skip_length:6;
394 u64 disable_rss:1;
395 u64 disable_tcp_reassembly:1;
396 u64 nodrop:1;
397 u64 dest_alg:2;
398 u64 rsvd0:2;
399 u64 dest_rq:11;
446 u64 rsvd1:32;
447 u64 crc_ival:32;
448 u64 subdesc_type:4;
449 u64 crc_alg:2;
450 u64 rsvd0:10;
451 u64 crc_insert_pos:16;
452 u64 hdr_start:16;
453 u64 crc_len:16;
455 u64 crc_len:16;
456 u64 hdr_start:16;
457 u64 crc_insert_pos:16;
458 u64 rsvd0:10;
459 u64 crc_alg:2;
460 u64 subdesc_type:4;
461 u64 crc_ival:32;
462 u64 rsvd1:32;
468 u64 subdesc_type:4; /* W0 */
469 u64 ld_type:2;
470 u64 rsvd0:42;
471 u64 size:16;
473 u64 rsvd1:15; /* W1 */
474 u64 addr:49;
476 u64 size:16;
477 u64 rsvd0:42;
478 u64 ld_type:2;
479 u64 subdesc_type:4; /* W0 */
481 u64 addr:49;
482 u64 rsvd1:15; /* W1 */
489 u64 subdesc_type:4; /* W0 */
490 u64 rsvd0:46;
491 u64 len:14;
493 u64 data:64; /* W1 */
495 u64 len:14;
496 u64 rsvd0:46;
497 u64 subdesc_type:4; /* W0 */
499 u64 data:64; /* W1 */
505 u64 subdesc_type:4; /* W0 */
506 u64 mem_alg:4;
507 u64 mem_dsz:2;
508 u64 wmem:1;
509 u64 rsvd0:21;
510 u64 offset:32;
512 u64 rsvd1:15; /* W1 */
513 u64 addr:49;
515 u64 offset:32;
516 u64 rsvd0:21;
517 u64 wmem:1;
518 u64 mem_dsz:2;
519 u64 mem_alg:4;
520 u64 subdesc_type:4; /* W0 */
522 u64 addr:49;
523 u64 rsvd1:15; /* W1 */
529 u64 subdesc_type:4;
530 u64 tso:1;
531 u64 post_cqe:1; /* Post CQE on no error also */
532 u64 dont_send:1;
533 u64 tstmp:1;
534 u64 subdesc_cnt:8;
535 u64 csum_l4:2;
536 u64 csum_l3:1;
537 u64 csum_inner_l4:2;
538 u64 csum_inner_l3:1;
539 u64 rsvd0:2;
540 u64 l4_offset:8;
541 u64 l3_offset:8;
542 u64 rsvd1:4;
543 u64 tot_len:20; /* W0 */
545 u64 rsvd2:24;
546 u64 inner_l4_offset:8;
547 u64 inner_l3_offset:8;
548 u64 tso_start:8;
549 u64 rsvd3:2;
550 u64 tso_max_paysize:14; /* W1 */
552 u64 tot_len:20;
553 u64 rsvd1:4;
554 u64 l3_offset:8;
555 u64 l4_offset:8;
556 u64 rsvd0:2;
557 u64 csum_inner_l3:1;
558 u64 csum_inner_l4:2;
559 u64 csum_l3:1;
560 u64 csum_l4:2;
561 u64 subdesc_cnt:8;
562 u64 tstmp:1;
563 u64 dont_send:1;
564 u64 post_cqe:1; /* Post CQE on no error also */
565 u64 tso:1;
566 u64 subdesc_type:4; /* W0 */
568 u64 tso_max_paysize:14;
569 u64 rsvd3:2;
570 u64 tso_start:8;
571 u64 inner_l3_offset:8;
572 u64 inner_l4_offset:8;
573 u64 rsvd2:24; /* W1 */
580 u64 reserved_2_63:62;
581 u64 ena:1;
582 u64 tcp_ena:1;
584 u64 tcp_ena:1;
585 u64 ena:1;
586 u64 reserved_2_63:62;
592 u64 reserved_43_63:21;
593 u64 ena:1;
594 u64 reset:1;
595 u64 caching:1;
596 u64 reserved_35_39:5;
597 u64 qsize:3;
598 u64 reserved_25_31:7;
599 u64 avg_con:9;
600 u64 reserved_0_15:16;
602 u64 reserved_0_15:16;
603 u64 avg_con:9;
604 u64 reserved_25_31:7;
605 u64 qsize:3;
606 u64 reserved_35_39:5;
607 u64 caching:1;
608 u64 reset:1;
609 u64 ena:1;
610 u64 reserved_43_63:21;
616 u64 reserved_32_63:32;
617 u64 cq_limit:8;
618 u64 reserved_20_23:4;
619 u64 ena:1;
620 u64 reserved_18_18:1;
621 u64 reset:1;
622 u64 ldwb:1;
623 u64 reserved_11_15:5;
624 u64 qsize:3;
625 u64 reserved_3_7:5;
626 u64 tstmp_bgx_intf:3;
628 u64 tstmp_bgx_intf:3;
629 u64 reserved_3_7:5;
630 u64 qsize:3;
631 u64 reserved_11_15:5;
632 u64 ldwb:1;
633 u64 reset:1;
634 u64 reserved_18_18:1;
635 u64 ena:1;
636 u64 reserved_20_23:4;
637 u64 cq_limit:8;
638 u64 reserved_32_63:32;
644 u64 reserved_45_63:19;
645 u64 ena:1;
646 u64 reset:1;
647 u64 ldwb:1;
648 u64 reserved_36_41:6;
649 u64 qsize:4;
650 u64 reserved_25_31:7;
651 u64 avg_con:9;
652 u64 reserved_12_15:4;
653 u64 lines:12;
655 u64 lines:12;
656 u64 reserved_12_15:4;
657 u64 avg_con:9;
658 u64 reserved_25_31:7;
659 u64 qsize:4;
660 u64 reserved_36_41:6;
661 u64 ldwb:1;
662 u64 reset:1;
663 u64 ena: 1;
664 u64 reserved_45_63:19;
670 u64 reserved_32_63:32;
671 u64 ena:1;
672 u64 reserved_27_30:4;
673 u64 sq_ins_ena:1;
674 u64 sq_ins_pos:6;
675 u64 lock_ena:1;
676 u64 lock_viol_cqe_ena:1;
677 u64 send_tstmp_ena:1;
678 u64 be:1;
679 u64 reserved_7_15:9;
680 u64 vnic:7;
682 u64 vnic:7;
683 u64 reserved_7_15:9;
684 u64 be:1;
685 u64 send_tstmp_ena:1;
686 u64 lock_viol_cqe_ena:1;
687 u64 lock_ena:1;
688 u64 sq_ins_pos:6;
689 u64 sq_ins_ena:1;
690 u64 reserved_27_30:4;
691 u64 ena:1;
692 u64 reserved_32_63:32;