brocade/bna/bfa_ioc.c

1497 bfa_flash_set_cmd(void __iomem *pci_bar, u8 wr_cnt,
1508 	writel(cmd.i, (pci_bar + FLI_CMD_REG));
1512 bfa_flash_set_addr(void __iomem *pci_bar, u32 address)
1518 	writel(addr.i, (pci_bar + FLI_ADDR_REG));
1522 bfa_flash_cmd_act_check(void __iomem *pci_bar)
1526 	cmd.i = readl(pci_bar + FLI_CMD_REG);
1536 bfa_flash_fifo_flush(void __iomem *pci_bar)
1541 	dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
1548 		readl(pci_bar + FLI_RDDATA_REG);
1552 		dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
1565 bfa_flash_status_read(void __iomem *pci_bar)
1572 	status = bfa_flash_fifo_flush(pci_bar);
1576 	bfa_flash_set_cmd(pci_bar, 0, 4, 0, BFA_FLASH_READ_STATUS);
1579 		status = bfa_flash_cmd_act_check(pci_bar);
1587 	dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
1591 	ret_status = readl(pci_bar + FLI_RDDATA_REG);
1594 	status = bfa_flash_fifo_flush(pci_bar);
1603 bfa_flash_read_start(void __iomem *pci_bar, u32 offset, u32 len,
1613 	status = bfa_flash_status_read(pci_bar);
1615 		status = bfa_flash_status_read(pci_bar);
1624 	bfa_flash_set_addr(pci_bar, offset);
1626 	bfa_flash_set_cmd(pci_bar, 0, (u8)len, 4, BFA_FLASH_FAST_READ);
1633 bfa_flash_read_check(void __iomem *pci_bar)
1635 	if (bfa_flash_cmd_act_check(pci_bar))
1643 bfa_flash_read_end(void __iomem *pci_bar, u32 len, char *buf)
1649 		u32 w = readl(pci_bar + FLI_RDDATA_REG);
1653 	bfa_flash_fifo_flush(pci_bar);
1691 bfa_flash_raw_read(void __iomem *pci_bar, u32 offset, char *buf,
1701 	status = bfa_flash_sem_get(pci_bar);
1712 		status = bfa_flash_read_start(pci_bar, offset + off, l,
1715 			bfa_flash_sem_put(pci_bar);
1720 		while (bfa_flash_read_check(pci_bar)) {
1722 				bfa_flash_sem_put(pci_bar);
1727 		bfa_flash_read_end(pci_bar, l, &buf[off]);
1732 	bfa_flash_sem_put(pci_bar);