Lines Matching refs:vars
216 struct link_vars *vars, u8 notify);
498 static u32 bnx2x_ets_get_min_w_val_nig(const struct link_vars *vars)
502 if (vars->link_up) {
503 if (vars->line_speed == SPEED_20000)
570 const struct link_vars *vars)
574 const u32 min_w_val = bnx2x_ets_get_min_w_val_nig(vars);
745 const struct link_vars *vars)
755 bnx2x_ets_e3b0_nig_disabled(params, vars);
768 struct link_vars *vars)
776 bnx2x_status = bnx2x_ets_e3b0_disabled(params, vars);
1129 const struct link_vars *vars,
1136 const u32 min_w_val_nig = bnx2x_ets_get_min_w_val_nig(vars);
1350 struct link_vars *vars,
1371 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)
1375 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
1468 struct link_vars *vars)
1546 struct link_vars *vars, u8 lb)
1568 switch (vars->line_speed) {
1583 vars->line_speed);
1586 if (!(vars->flow_ctrl & BNX2X_FLOW_CTRL_TX))
1589 if (!(vars->flow_ctrl & BNX2X_FLOW_CTRL_RX))
1592 if (vars->duplex == DUPLEX_HALF)
1599 if (vars->eee_status & SHMEM_EEE_ADV_STATUS_MASK) {
1638 ((vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) != 0), 1);
1639 vars->mac_type = MAC_TYPE_UMAC;
1735 struct link_vars *vars, u8 lb)
1743 bnx2x_xmac_init(params, vars->line_speed);
1773 bnx2x_update_pfc_xmac(params, vars, 0);
1775 if (vars->eee_status & SHMEM_EEE_ADV_STATUS_MASK) {
1787 if ((vars->line_speed == SPEED_20000) &&
1797 ((vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) != 0), 1);
1799 vars->mac_type = MAC_TYPE_XMAC;
1805 struct link_vars *vars, u8 lb)
1822 if (vars->phy_flags & PHY_XGXS_FLAG) {
1853 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)
1858 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
1925 (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX))
1933 vars->mac_type = MAC_TYPE_EMAC;
1938 struct link_vars *vars)
1948 (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX))
1959 (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX))
1967 struct link_vars *vars,
1981 (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX))
1993 (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX))
2119 struct link_vars *vars,
2215 struct link_vars *vars,
2227 vars->link_status |= LINK_STATUS_PFC_ENABLED;
2229 vars->link_status &= ~LINK_STATUS_PFC_ENABLED;
2231 bnx2x_update_mng(params, vars->link_status);
2234 bnx2x_update_pfc_nig(params, vars, pfc_params);
2236 if (!vars->link_up)
2242 if (vars->mac_type == MAC_TYPE_XMAC)
2243 bnx2x_update_pfc_xmac(params, vars, 0);
2250 bnx2x_emac_enable(params, vars, 0);
2254 bnx2x_update_pfc_bmac2(params, vars, bmac_loopback);
2256 bnx2x_update_pfc_bmac1(params, vars);
2261 (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX))
2269 struct link_vars *vars,
2311 bnx2x_update_pfc_bmac1(params, vars);
2333 struct link_vars *vars,
2392 bnx2x_update_pfc_bmac2(params, vars, is_lb);
2398 struct link_vars *vars,
2420 rc = bnx2x_bmac2_enable(params, vars, is_lb);
2422 rc = bnx2x_bmac1_enable(params, vars, is_lb);
2429 (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX))
2438 vars->mac_type = MAC_TYPE_BMAC;
2900 struct link_vars *vars)
2917 vars->eee_status &= ~(SHMEM_EEE_TIMER_MASK | SHMEM_EEE_TIME_OUTPUT_BIT);
2921 vars->eee_status |= (eee_idle & SHMEM_EEE_TIMER_MASK) |
2926 vars->eee_status |= eee_mode;
2933 struct link_vars *vars, u8 mode)
2935 vars->eee_status |= ((u32) mode) << SHMEM_EEE_SUPPORTED_SHIFT;
2937 /* Propagate params' bits --> vars (for migration exposure) */
2939 vars->eee_status |= SHMEM_EEE_LPI_REQUESTED_BIT;
2941 vars->eee_status &= ~SHMEM_EEE_LPI_REQUESTED_BIT;
2944 vars->eee_status |= SHMEM_EEE_REQUESTED_BIT;
2946 vars->eee_status &= ~SHMEM_EEE_REQUESTED_BIT;
2948 return bnx2x_eee_set_timers(params, vars);
2953 struct link_vars *vars)
2962 vars->eee_status &= ~SHMEM_EEE_ADV_STATUS_MASK;
2969 struct link_vars *vars, u8 modes)
2988 vars->eee_status &= ~SHMEM_EEE_ADV_STATUS_MASK;
2989 vars->eee_status |= (modes << SHMEM_EEE_ADV_STATUS_SHIFT);
3006 struct link_vars *vars)
3019 if (vars->line_speed == SPEED_100)
3027 if (vars->line_speed == SPEED_1000)
3035 if (vars->line_speed == SPEED_10000)
3041 vars->eee_status &= ~SHMEM_EEE_LP_ADV_STATUS_MASK;
3042 vars->eee_status |= (lp_adv << SHMEM_EEE_LP_ADV_STATUS_SHIFT);
3046 vars->eee_status |= SHMEM_EEE_ACTIVE_BIT;
3420 struct link_vars *vars)
3450 vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_ENABLED;
3462 struct link_vars *vars)
3472 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);
3473 if ((vars->ieee_fc &
3478 if ((vars->ieee_fc &
3489 struct link_vars *vars,
3497 vars->flow_ctrl = BNX2X_FLOW_CTRL_TX;
3502 vars->flow_ctrl = BNX2X_FLOW_CTRL_RX;
3515 vars->flow_ctrl = BNX2X_FLOW_CTRL_BOTH;
3518 vars->flow_ctrl = BNX2X_FLOW_CTRL_RX;
3524 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
3528 vars->link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE;
3530 vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE;
3536 struct link_vars *vars)
3585 bnx2x_pause_resolve(phy, params, vars, pause_result);
3591 struct link_vars *vars)
3594 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
3598 bnx2x_ext_phy_update_adv_fc(phy, params, vars);
3600 vars->flow_ctrl = phy->req_flow_ctrl;
3602 vars->flow_ctrl = params->req_fc_auto_adv;
3603 else if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {
3605 bnx2x_ext_phy_update_adv_fc(phy, params, vars);
3630 struct link_vars *vars)
3668 struct link_vars *vars,
3699 vars->check_kr2_recovery_cnt = CHECK_KR2_RECOVERY_CNT;
3731 struct link_vars *vars) {
3759 if (((vars->line_speed == SPEED_AUTO_NEG) &&
3761 (vars->line_speed == SPEED_1000)) {
3769 if (((vars->line_speed == SPEED_AUTO_NEG) &&
3771 (vars->line_speed == SPEED_10000)) {
3823 bnx2x_ext_phy_set_pause(params, phy, vars);
3824 vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY;
3847 bnx2x_warpcore_enable_AN_KR2(phy, params, vars);
3874 bnx2x_disable_kr2(params, vars, phy);
3883 struct link_vars *vars)
4401 struct link_vars *vars)
4407 vars->turn_to_run_wc_rt = vars->turn_to_run_wc_rt ? 0 : 1;
4409 if (!vars->turn_to_run_wc_rt)
4412 if (vars->rx_tx_asic_rst) {
4429 vars->rx_tx_asic_rst = 0;
4439 vars->rx_tx_asic_rst--;
4441 vars->rx_tx_asic_rst);
4492 struct link_vars *vars)
4504 vars->line_speed, serdes_net_if);
4507 vars->phy_flags |= PHY_XGXS_FLAG;
4512 vars->phy_flags |= PHY_SGMII_FLAG;
4521 bnx2x_warpcore_enable_AN_KR(phy, params, vars);
4524 bnx2x_warpcore_set_10G_KR(phy, params, vars);
4530 if (vars->line_speed == SPEED_10000) {
4567 if (vars->line_speed != SPEED_20000) {
4579 bnx2x_warpcore_enable_AN_KR(phy, params, vars);
4699 struct link_vars *vars)
4703 if (vars->link_status & LINK_STATUS_PHYSICAL_LINK_FLAG)
4704 vars->phy_flags |= PHY_PHYSICAL_LINK_FLAG;
4705 vars->link_up = (vars->link_status & LINK_STATUS_LINK_UP);
4706 if (vars->link_up) {
4709 vars->phy_link_up = 1;
4710 vars->duplex = DUPLEX_FULL;
4711 switch (vars->link_status &
4714 vars->duplex = DUPLEX_HALF;
4717 vars->line_speed = SPEED_10;
4721 vars->duplex = DUPLEX_HALF;
4725 vars->line_speed = SPEED_100;
4729 vars->duplex = DUPLEX_HALF;
4732 vars->line_speed = SPEED_1000;
4736 vars->duplex = DUPLEX_HALF;
4739 vars->line_speed = SPEED_2500;
4743 vars->line_speed = SPEED_10000;
4746 vars->line_speed = SPEED_20000;
4751 vars->flow_ctrl = 0;
4752 if (vars->link_status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED)
4753 vars->flow_ctrl |= BNX2X_FLOW_CTRL_TX;
4755 if (vars->link_status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED)
4756 vars->flow_ctrl |= BNX2X_FLOW_CTRL_RX;
4758 if (!vars->flow_ctrl)
4759 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
4761 if (vars->line_speed &&
4762 ((vars->line_speed == SPEED_10) ||
4763 (vars->line_speed == SPEED_100))) {
4764 vars->phy_flags |= PHY_SGMII_FLAG;
4766 vars->phy_flags &= ~PHY_SGMII_FLAG;
4768 if (vars->line_speed &&
4770 (vars->line_speed == SPEED_1000))
4771 vars->phy_flags |= PHY_SGMII_FLAG;
4773 link_10g_plus = (vars->line_speed >= SPEED_10000);
4777 vars->mac_type = MAC_TYPE_XMAC;
4779 vars->mac_type = MAC_TYPE_BMAC;
4782 vars->mac_type = MAC_TYPE_UMAC;
4784 vars->mac_type = MAC_TYPE_EMAC;
4789 vars->phy_link_up = 0;
4791 vars->line_speed = 0;
4792 vars->duplex = DUPLEX_FULL;
4793 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
4796 vars->mac_type = MAC_TYPE_NONE;
4797 if (vars->link_status & LINK_STATUS_PHYSICAL_LINK_FLAG)
4798 vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG;
4799 if (vars->link_status & LINK_STATUS_SFP_TX_FAULT)
4800 vars->phy_flags |= PHY_SFP_TX_FAULT_FLAG;
4805 struct link_vars *vars)
4811 set_phy_vars(params, vars);
4813 vars->link_status = REG_RD(bp, params->shmem_base +
4820 vars->link_status |= LINK_STATUS_LINK_UP;
4823 vars->eee_status = REG_RD(bp, params->shmem2_base +
4827 vars->phy_flags = PHY_XGXS_FLAG;
4828 bnx2x_sync_link(params, vars);
4851 vars->aeu_int_mask = REG_RD(bp, sync_offset);
4854 if (vars->link_status & LINK_STATUS_PFC_ENABLED)
4866 vars->link_status, vars->phy_link_up, vars->aeu_int_mask);
4868 vars->line_speed, vars->duplex, vars->flow_ctrl);
5033 struct link_vars *vars,
5045 if (vars->line_speed == SPEED_AUTO_NEG)
5063 if (vars->line_speed == SPEED_AUTO_NEG)
5077 if (vars->line_speed == SPEED_AUTO_NEG) {
5137 struct link_vars *vars)
5167 if (!((vars->line_speed == SPEED_1000) ||
5168 (vars->line_speed == SPEED_100) ||
5169 (vars->line_speed == SPEED_10))) {
5173 if (vars->line_speed == SPEED_10000)
5267 struct link_vars *vars)
5289 if (!(vars->line_speed == SPEED_AUTO_NEG)) {
5301 switch (vars->line_speed) {
5316 vars->line_speed);
5373 struct link_vars *vars,
5414 bnx2x_pause_resolve(phy, params, vars, pause_result);
5420 struct link_vars *vars,
5424 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
5430 bnx2x_update_adv_fc(phy, params, vars, gp_status);
5432 vars->flow_ctrl = phy->req_flow_ctrl;
5434 vars->flow_ctrl = params->req_fc_auto_adv;
5436 (!(vars->phy_flags & PHY_SGMII_FLAG))) {
5438 vars->flow_ctrl = params->req_fc_auto_adv;
5441 bnx2x_update_adv_fc(phy, params, vars, gp_status);
5443 DP(NETIF_MSG_LINK, "flow_ctrl 0x%x\n", vars->flow_ctrl);
5516 struct link_vars *vars,
5520 vars->link_status |=
5524 vars->link_status |=
5529 struct link_vars *vars,
5536 vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_ENABLED;
5540 vars->phy_link_up = 1;
5541 vars->link_status |= LINK_STATUS_LINK_UP;
5545 vars->line_speed = SPEED_10;
5547 vars->link_status |= LINK_10TFD;
5549 vars->link_status |= LINK_10THD;
5553 vars->line_speed = SPEED_100;
5555 vars->link_status |= LINK_100TXFD;
5557 vars->link_status |= LINK_100TXHD;
5562 vars->line_speed = SPEED_1000;
5564 vars->link_status |= LINK_1000TFD;
5566 vars->link_status |= LINK_1000THD;
5570 vars->line_speed = SPEED_2500;
5572 vars->link_status |= LINK_2500TFD;
5574 vars->link_status |= LINK_2500THD;
5590 vars->line_speed = SPEED_10000;
5591 vars->link_status |= LINK_10GTFD;
5595 vars->line_speed = SPEED_20000;
5596 vars->link_status |= LINK_20GTFD;
5607 vars->phy_link_up = 0;
5609 vars->duplex = DUPLEX_FULL;
5610 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
5611 vars->mac_type = MAC_TYPE_NONE;
5614 vars->phy_link_up, vars->line_speed);
5620 struct link_vars *vars)
5639 rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, speed_mask,
5646 vars->duplex = duplex;
5647 bnx2x_flow_ctrl_resolve(phy, params, vars, gp_status);
5649 bnx2x_xgxs_an_resolve(phy, params, vars,
5662 (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE)) {
5669 vars->link_status |=
5673 vars->link_status |=
5680 vars->link_status |=
5683 vars->link_status |=
5688 vars->duplex, vars->flow_ctrl, vars->link_status);
5694 struct link_vars *vars)
5720 bnx2x_ext_phy_resolve_fc(phy, params, vars);
5747 vars->link_status |=
5755 vars->link_status |=
5758 bnx2x_ext_phy_resolve_fc(phy, params, vars);
5759 vars->duplex = duplex;
5763 if ((vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) &&
5771 vars->link_status |=
5775 vars->link_status |=
5782 vars->link_status |=
5785 vars->link_status |=
5805 rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, gp_speed,
5811 vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY;
5814 vars->duplex, vars->flow_ctrl, vars->link_status);
5857 struct link_vars *vars)
5869 switch (vars->line_speed) {
5889 vars->line_speed);
5893 if (vars->duplex == DUPLEX_HALF)
5899 bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed);
5929 struct link_vars *vars)
5934 if (!(vars->phy_flags & PHY_SGMII_FLAG)) {
5941 if (vars->line_speed != SPEED_AUTO_NEG ||
5947 bnx2x_set_autoneg(phy, params, vars, 0);
5950 bnx2x_program_serdes(phy, params, vars);
5960 vars->ieee_fc);
5963 bnx2x_set_autoneg(phy, params, vars, enable_cl73);
5972 bnx2x_initialize_sgmii_process(phy, params, vars);
5978 struct link_vars *vars)
5981 vars->phy_flags |= PHY_XGXS_FLAG;
5991 vars->phy_flags |= PHY_SGMII_FLAG;
5993 vars->phy_flags &= ~PHY_SGMII_FLAG;
5995 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);
6125 struct link_vars *vars, u8 is_10g_plus)
6137 if (vars->phy_link_up) {
6299 struct link_vars *vars, u8 mode, u32 speed)
6342 if (!vars->link_up)
6447 int bnx2x_test_link(struct link_params *params, struct link_vars *vars,
6529 struct link_vars *vars)
6538 vars->line_speed = params->phy[INT_PHY].req_line_speed;
6545 bnx2x_prepare_xgxs(¶ms->phy[INT_PHY], params, vars);
6554 if (vars->line_speed == SPEED_AUTO_NEG &&
6559 params->phy[INT_PHY].config_init(phy, params, vars);
6565 vars->line_speed = params->phy[INT_PHY].req_line_speed;
6571 vars->link_status |= LINK_STATUS_SERDES_LINK;
6582 vars->link_status |= LINK_STATUS_SERDES_LINK;
6593 params, vars);
6634 struct link_vars *vars)
6640 bnx2x_set_led(params, vars, LED_MODE_OFF, 0);
6641 vars->phy_flags &= ~PHY_PHYSICAL_LINK_FLAG;
6643 vars->mac_type = MAC_TYPE_NONE;
6646 vars->link_status &= ~LINK_UPDATE_MASK;
6647 vars->line_speed = 0;
6648 bnx2x_update_mng(params, vars->link_status);
6669 vars->eee_status &= ~(SHMEM_EEE_LP_ADV_STATUS_MASK |
6672 bnx2x_update_mng_eee(params, vars->eee_status);
6681 struct link_vars *vars,
6688 vars->link_status |= (LINK_STATUS_LINK_UP |
6690 vars->phy_flags |= PHY_PHYSICAL_LINK_FLAG;
6692 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
6693 vars->link_status |=
6696 if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)
6697 vars->link_status |=
6701 if (bnx2x_xmac_enable(params, vars, 0) ==
6704 vars->link_up = 0;
6705 vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG;
6706 vars->link_status &= ~LINK_STATUS_LINK_UP;
6709 bnx2x_umac_enable(params, vars, 0);
6710 bnx2x_set_led(params, vars,
6711 LED_MODE_OPER, vars->line_speed);
6713 if ((vars->eee_status & SHMEM_EEE_ACTIVE_BIT) &&
6714 (vars->eee_status & SHMEM_EEE_LPI_REQUESTED_BIT)) {
6726 if (bnx2x_bmac_enable(params, vars, 0, 1) ==
6729 vars->link_up = 0;
6730 vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG;
6731 vars->link_status &= ~LINK_STATUS_LINK_UP;
6734 bnx2x_set_led(params, vars,
6737 rc = bnx2x_emac_program(params, vars);
6738 bnx2x_emac_enable(params, vars, 0);
6741 if ((vars->link_status &
6743 && (!(vars->phy_flags & PHY_SGMII_FLAG)) &&
6751 rc |= bnx2x_pbf_update(params, vars->flow_ctrl,
6752 vars->line_speed);
6758 bnx2x_update_mng(params, vars->link_status);
6759 bnx2x_update_mng_eee(params, vars->eee_status);
6763 bnx2x_check_half_open_conn(params, vars, 0);
6801 int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
6807 u32 prev_link_status = vars->link_status;
6811 u16 ext_phy_line_speed = 0, prev_line_speed = vars->line_speed;
6813 vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG;
6814 vars->link_status &= ~LINK_UPDATE_MASK;
6824 /* different consideration, since vars holds inner state */
6825 phy_vars[phy_index].eee_status = vars->eee_status;
6832 port, (vars->phy_flags & PHY_XGXS_FLAG),
6853 * is up. Note that instead of the common vars, a temporary
6854 * vars argument is used since each phy may have different link/
6911 prev_line_speed = vars->line_speed;
6921 params, vars);
6922 /* The INT_PHY flow control reside in the vars. This include the
6925 * to the vars. The ext_phy_line_speed is needed to check if the
6930 vars->flow_ctrl = phy_vars[active_external_phy].flow_ctrl;
6934 vars->link_status |= phy_vars[active_external_phy].link_status;
6950 vars->duplex = phy_vars[active_external_phy].duplex;
6953 vars->link_status |= LINK_STATUS_SERDES_LINK;
6955 vars->link_status &= ~LINK_STATUS_SERDES_LINK;
6957 vars->eee_status = phy_vars[active_external_phy].eee_status;
6973 DP(NETIF_MSG_LINK, "vars->flow_ctrl = 0x%x, vars->link_status = 0x%x,"
6974 " ext_phy_line_speed = %d\n", vars->flow_ctrl,
6975 vars->link_status, ext_phy_line_speed);
6981 if (vars->phy_link_up) {
6983 (ext_phy_line_speed != vars->line_speed)) {
6986 " link speed %d\n", vars->line_speed,
6988 vars->phy_link_up = 0;
6989 } else if (prev_line_speed != vars->line_speed) {
6997 link_10g_plus = (vars->line_speed >= SPEED_10000);
6999 bnx2x_link_int_ack(params, vars, link_10g_plus);
7011 vars->phy_link_up,
7016 && ext_phy_link_up && !vars->phy_link_up) {
7017 vars->line_speed = ext_phy_line_speed;
7018 if (vars->line_speed < SPEED_1000)
7019 vars->phy_flags |= PHY_SGMII_FLAG;
7021 vars->phy_flags &= ~PHY_SGMII_FLAG;
7026 vars);
7032 vars->link_up = (vars->phy_link_up &&
7039 vars->link_status |= LINK_STATUS_PFC_ENABLED;
7041 vars->link_status &= ~LINK_STATUS_PFC_ENABLED;
7043 if (vars->link_up)
7044 rc = bnx2x_update_link_up(params, vars, link_10g_plus);
7046 rc = bnx2x_update_link_down(params, vars);
7048 if ((prev_link_status ^ vars->link_status) & LINK_STATUS_LINK_UP)
7096 struct link_vars *vars)
7106 vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_COMPLETE;
7108 vars->link_status |= LINK_STATUS_PARALLEL_DETECTION_USED;
7116 struct link_vars *vars)
7121 vars->flow_ctrl = phy->req_flow_ctrl;
7125 if (bnx2x_ext_phy_resolve_fc(phy, params, vars) &&
7126 (vars->flow_ctrl == BNX2X_FLOW_CTRL_NONE)) {
7142 bnx2x_pause_resolve(phy, params, vars, pause_result);
7325 struct link_vars *vars)
7334 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);
7335 if ((vars->ieee_fc &
7340 if ((vars->ieee_fc &
7345 if ((vars->ieee_fc &
7376 struct link_vars *vars)
7395 bnx2x_8073_set_pause_cl37(params, phy, vars);
7512 bnx2x_ext_phy_set_pause(params, phy, vars);
7523 struct link_vars *vars)
7604 vars->line_speed = SPEED_10000;
7609 vars->line_speed = SPEED_2500;
7614 vars->line_speed = SPEED_1000;
7634 if (vars->line_speed == SPEED_1000) {
7646 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
7647 bnx2x_8073_resolve_fc(phy, params, vars);
7648 vars->duplex = DUPLEX_FULL;
7651 if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {
7656 vars->link_status |=
7659 vars->link_status |=
7687 struct link_vars *vars)
7713 struct link_vars *vars)
7738 vars->line_speed = SPEED_10000;
7739 bnx2x_ext_phy_resolve_fc(phy, params, vars);
8835 struct link_vars *vars)
8872 vars->line_speed = SPEED_1000;
8874 vars->line_speed = SPEED_10000;
8875 bnx2x_ext_phy_resolve_fc(phy, params, vars);
8876 vars->duplex = DUPLEX_FULL;
8880 if (vars->line_speed == SPEED_10000) {
8886 vars->fault_detected = 1;
8897 struct link_vars *vars)
9001 struct link_vars *vars)
9003 return bnx2x_8706_8726_read_status(phy, params, vars);
9057 struct link_vars *vars)
9061 u8 link_up = bnx2x_8706_8726_read_status(phy, params, vars);
9069 vars->line_speed = 0;
9078 struct link_vars *vars)
9114 bnx2x_ext_phy_set_pause(params, phy, vars);
9293 struct link_vars *vars)
9462 struct link_vars *vars)
9481 vars->line_speed = 0;
9567 vars->line_speed = SPEED_10000;
9572 vars->line_speed = SPEED_1000;
9582 if (vars->line_speed == SPEED_10000) {
9590 vars->fault_detected = 1;
9595 bnx2x_ext_phy_resolve_fc(phy, params, vars);
9596 vars->duplex = DUPLEX_FULL;
9597 DP(NETIF_MSG_LINK, "duplex = 0x%x\n", vars->duplex);
9803 struct link_vars *vars)
9817 bnx2x_ext_phy_set_pause(params, phy, vars);
9949 struct link_vars *vars)
9961 bnx2x_848xx_cmn_config_init(phy, params, vars);
10145 struct link_vars *vars)
10244 struct link_vars *vars)
10260 return bnx2x_eee_disable(phy, params, vars);
10265 struct link_vars *vars)
10278 return bnx2x_eee_advertise(phy, params, vars, SHMEM_EEE_10G_ADV);
10284 struct link_vars *vars)
10320 temp = vars->line_speed;
10321 vars->line_speed = SPEED_10000;
10322 bnx2x_set_autoneg(¶ms->phy[INT_PHY], params, vars, 0);
10323 bnx2x_program_serdes(¶ms->phy[INT_PHY], params, vars);
10324 vars->line_speed = temp;
10384 bnx2x_848xx_pair_swap_cfg(phy, params, vars);
10398 rc = bnx2x_848xx_cmn_config_init(phy, params, vars);
10425 rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_10G_ADV);
10428 bnx2x_8483x_disable_eee(phy, params, vars);
10436 rc = bnx2x_8483x_enable_eee(phy, params, vars);
10438 rc = bnx2x_8483x_disable_eee(phy, params, vars);
10444 vars->eee_status &= ~SHMEM_EEE_SUPPORTED_MASK;
10484 struct link_vars *vars)
10502 vars->line_speed = SPEED_10000;
10503 vars->duplex = DUPLEX_FULL;
10505 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
10525 vars->line_speed = SPEED_10;
10527 vars->line_speed = SPEED_100;
10529 vars->line_speed = SPEED_1000;
10531 vars->line_speed = 0;
10537 vars->duplex = DUPLEX_FULL;
10539 vars->duplex = DUPLEX_HALF;
10543 vars->line_speed,
10544 (vars->duplex == DUPLEX_FULL));
10551 vars->link_status |=
10558 vars->link_status |=
10564 vars->line_speed);
10565 bnx2x_ext_phy_resolve_fc(phy, params, vars);
10571 vars->link_status |=
10574 vars->link_status |=
10577 vars->link_status |=
10580 vars->link_status |=
10583 vars->link_status |=
10590 vars->link_status |=
10593 vars->link_status |=
10600 vars->link_status |=
10605 bnx2x_eee_an_resolve(phy, params, vars);
11038 struct link_vars *vars)
11089 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);
11091 if ((vars->ieee_fc & MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) ==
11095 if ((vars->ieee_fc & MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) ==
11191 rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_1G_ADV);
11194 bnx2x_eee_disable(phy, params, vars);
11204 bnx2x_eee_advertise(phy, params, vars,
11208 bnx2x_eee_disable(phy, params, vars);
11211 vars->eee_status &= ~SHMEM_EEE_1G_ADV <<
11304 struct link_vars *vars)
11327 vars->line_speed = SPEED_1000;
11328 vars->duplex = DUPLEX_FULL;
11330 vars->line_speed = SPEED_1000;
11331 vars->duplex = DUPLEX_HALF;
11333 vars->line_speed = SPEED_100;
11334 vars->duplex = DUPLEX_FULL;
11338 vars->line_speed = SPEED_100;
11339 vars->duplex = DUPLEX_HALF;
11341 vars->line_speed = SPEED_10;
11342 vars->duplex = DUPLEX_FULL;
11344 vars->line_speed = SPEED_10;
11345 vars->duplex = DUPLEX_HALF;
11347 vars->line_speed = 0;
11351 vars->line_speed,
11352 (vars->duplex == DUPLEX_FULL));
11359 vars->link_status |=
11365 vars->link_status |=
11369 vars->line_speed);
11371 bnx2x_ext_phy_resolve_fc(phy, params, vars);
11373 if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {
11378 vars->link_status |=
11381 vars->link_status |=
11384 vars->link_status |=
11387 vars->link_status |=
11390 vars->link_status |=
11395 vars->link_status |=
11398 vars->link_status |=
11403 bnx2x_eee_an_resolve(phy, params, vars);
11463 struct link_vars *vars)
11482 bnx2x_ext_phy_set_pause(params, phy, vars);
11502 struct link_vars *vars)
11525 vars->line_speed = SPEED_10000;
11526 vars->duplex = DUPLEX_FULL;
11529 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
11530 bnx2x_ext_phy_resolve_fc(phy, params, vars);
11534 vars->link_status |=
12663 struct link_vars *vars)
12666 vars->link_up = 1;
12667 vars->line_speed = SPEED_10000;
12668 vars->duplex = DUPLEX_FULL;
12669 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
12670 vars->mac_type = MAC_TYPE_BMAC;
12672 vars->phy_flags = PHY_XGXS_FLAG;
12677 bnx2x_bmac_enable(params, vars, 1, 1);
12683 struct link_vars *vars)
12686 vars->link_up = 1;
12687 vars->line_speed = SPEED_1000;
12688 vars->duplex = DUPLEX_FULL;
12689 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
12690 vars->mac_type = MAC_TYPE_EMAC;
12692 vars->phy_flags = PHY_XGXS_FLAG;
12696 bnx2x_emac_enable(params, vars, 1);
12697 bnx2x_emac_program(params, vars);
12702 struct link_vars *vars)
12705 vars->link_up = 1;
12707 vars->line_speed = SPEED_10000;
12709 vars->line_speed = params->req_line_speed[0];
12710 vars->duplex = DUPLEX_FULL;
12711 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
12712 vars->mac_type = MAC_TYPE_XMAC;
12713 vars->phy_flags = PHY_XGXS_FLAG;
12723 bnx2x_xmac_enable(params, vars, 1);
12728 struct link_vars *vars)
12731 vars->link_up = 1;
12732 vars->line_speed = SPEED_1000;
12733 vars->duplex = DUPLEX_FULL;
12734 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
12735 vars->mac_type = MAC_TYPE_UMAC;
12736 vars->phy_flags = PHY_XGXS_FLAG;
12737 bnx2x_umac_enable(params, vars, 1);
12743 struct link_vars *vars)
12747 vars->link_up = 1;
12748 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
12749 vars->duplex = DUPLEX_FULL;
12751 vars->line_speed = SPEED_1000;
12754 vars->line_speed = SPEED_20000;
12756 vars->line_speed = SPEED_10000;
12760 bnx2x_link_initialize(params, vars);
12764 bnx2x_umac_enable(params, vars, 0);
12766 bnx2x_emac_program(params, vars);
12767 bnx2x_emac_enable(params, vars, 0);
12771 bnx2x_xmac_enable(params, vars, 0);
12773 bnx2x_bmac_enable(params, vars, 0, 1);
12791 bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed);
12813 struct link_vars *vars)
12821 bnx2x_link_status_update(params, vars);
12857 if (vars->line_speed < SPEED_10000)
12858 bnx2x_umac_enable(params, vars, 0);
12860 bnx2x_xmac_enable(params, vars, 0);
12862 if (vars->line_speed < SPEED_10000)
12863 bnx2x_emac_enable(params, vars, 0);
12865 bnx2x_bmac_enable(params, vars, 0, !dont_clear_stat);
12888 struct link_vars *vars,
12894 bnx2x_link_reset(params, vars, 1);
12947 int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
12957 vars->link_status = 0;
12958 vars->phy_link_up = 0;
12959 vars->link_up = 0;
12960 vars->line_speed = 0;
12961 vars->duplex = DUPLEX_FULL;
12962 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
12963 vars->mac_type = MAC_TYPE_NONE;
12964 vars->phy_flags = 0;
12965 vars->check_kr2_recovery_cnt = 0;
12975 return bnx2x_avoid_link_flap(params, vars);
12980 bnx2x_cannot_avoid_link_flap(params, vars, lfa_status);
12989 bnx2x_emac_init(params, vars);
12992 vars->link_status |= LINK_STATUS_PFC_ENABLED;
12998 set_phy_vars(params, vars);
13003 bnx2x_init_bmac_loopback(params, vars);
13006 bnx2x_init_emac_loopback(params, vars);
13009 bnx2x_init_xmac_loopback(params, vars);
13012 bnx2x_init_umac_loopback(params, vars);
13016 bnx2x_init_xgxs_loopback(params, vars);
13025 bnx2x_link_initialize(params, vars);
13030 bnx2x_update_mng(params, vars->link_status);
13032 bnx2x_update_mng_eee(params, vars->eee_status);
13036 int bnx2x_link_reset(struct link_params *params, struct link_vars *vars,
13043 vars->link_status = 0;
13045 bnx2x_update_mng(params, vars->link_status);
13046 vars->eee_status &= ~(SHMEM_EEE_LP_ADV_STATUS_MASK |
13048 bnx2x_update_mng_eee(params, vars->eee_status);
13076 * Hold it as vars low
13080 bnx2x_set_led(params, vars, LED_MODE_OFF, 0);
13123 vars->link_up = 0;
13124 vars->phy_flags = 0;
13128 struct link_vars *vars)
13131 vars->link_up = 0;
13132 vars->phy_flags = 0;
13135 return bnx2x_link_reset(params, vars, 1);
13615 struct link_vars *vars)
13633 if ((vars->phy_flags & PHY_OVER_CURRENT_FLAG) == 0) {
13642 vars->phy_flags |= PHY_OVER_CURRENT_FLAG;
13646 vars->phy_flags &= ~PHY_OVER_CURRENT_FLAG;
13651 struct link_vars *vars, u32 status,
13657 u32 old_status = (vars->phy_flags & phy_flag) ? 1 : 0;
13673 DP(NETIF_MSG_LINK, "Link changed:[%x %x]->%x\n", vars->link_up,
13677 if ((vars->phy_flags & PHY_PHYSICAL_LINK_FLAG) == 0)
13684 vars->link_status &= ~LINK_STATUS_LINK_UP;
13685 vars->link_status |= link_flag;
13686 vars->link_up = 0;
13687 vars->phy_flags |= phy_flag;
13696 vars->link_status |= LINK_STATUS_LINK_UP;
13697 vars->link_status &= ~link_flag;
13698 vars->link_up = 1;
13699 vars->phy_flags &= ~phy_flag;
13705 bnx2x_sync_link(params, vars);
13707 bnx2x_set_led(params, vars, led_mode, SPEED_10000);
13710 bnx2x_update_mng(params, vars->link_status);
13713 vars->periodic_flags |= PERIODIC_FLAGS_LINK_EVENT;
13730 struct link_vars *vars,
13737 if (((vars->phy_flags & PHY_PHYSICAL_LINK_FLAG) == 0) ||
13759 bnx2x_analyze_link_error(params, vars, lss_status,
13778 bnx2x_analyze_link_error(params, vars, lss_status,
13786 struct link_vars *vars)
13803 led_change = bnx2x_analyze_link_error(params, vars, value,
13811 if (vars->phy_flags & PHY_SFP_TX_FAULT_FLAG) {
13813 vars->link_status |= LINK_STATUS_SFP_TX_FAULT;
13816 vars->link_status &= ~LINK_STATUS_SFP_TX_FAULT;
13828 struct link_vars *vars,
13833 bnx2x_warpcore_enable_AN_KR2(phy, params, vars);
13838 struct link_vars *vars,
13850 if (vars->check_kr2_recovery_cnt > 0) {
13851 vars->check_kr2_recovery_cnt--;
13858 bnx2x_kr2_recovery(params, vars, phy);
13876 bnx2x_kr2_recovery(params, vars, phy);
13895 bnx2x_kr2_recovery(params, vars, phy);
13903 bnx2x_disable_kr2(params, vars, phy);
13910 void bnx2x_period_func(struct link_params *params, struct link_vars *vars)
13917 if (bnx2x_check_half_open_conn(params, vars, 1) !=
13931 bnx2x_check_kr2_wa(params, vars, phy);
13932 bnx2x_check_over_curr(params, vars);
13933 if (vars->rx_tx_asic_rst)
13934 bnx2x_warpcore_config_runtime(phy, params, vars);
13942 bnx2x_sfp_tx_fault_detection(phy, params, vars);
13943 } else if (vars->link_status &
13946 vars->link_status &= ~LINK_STATUS_SFP_TX_FAULT;
13947 vars->phy_flags &= ~PHY_SFP_TX_FAULT_FLAG;
13949 bnx2x_update_mng(params, vars->link_status);
13998 void bnx2x_init_mod_abs_int(struct bnx2x *bp, struct link_vars *vars,
14040 vars->aeu_int_mask = AEU_INPUTS_ATTN_BITS_GPIO0_FUNCTION_0 <<
14046 REG_WR(bp, sync_offset, vars->aeu_int_mask);
14049 gpio_num, gpio_port, vars->aeu_int_mask);
14058 aeu_mask |= vars->aeu_int_mask;