Lines Matching refs:shmem_base

269 	link_status = REG_RD(bp, params->shmem_base +
2103 REG_WR(bp, params->shmem_base +
2885 eee_mode = ((REG_RD(bp, params->shmem_base +
3062 board_cfg = REG_RD(bp, params->shmem_base +
3070 sfp_ctrl = REG_RD(bp, params->shmem_base +
3812 if (REG_RD(bp, params->shmem_base +
3852 wc_lane_config = REG_RD(bp, params->shmem_base +
4004 cfg_tap_val = REG_RD(bp, params->shmem_base +
4330 u32 shmem_base, u8 port,
4337 cfg_pin = (REG_RD(bp, shmem_base +
4374 params->shmem_base, params->port,
4414 serdes_net_if = (REG_RD(bp, params->shmem_base +
4477 cfg_pin = REG_RD(bp, params->shmem_base +
4498 serdes_net_if = (REG_RD(bp, params->shmem_base +
4813 vars->link_status = REG_RD(bp, params->shmem_base +
4830 sync_offset = params->shmem_base +
4847 sync_offset = params->shmem_base +
7421 if (REG_RD(bp, params->shmem_base +
7708 bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0);
7794 tx_en_mode = REG_RD(bp, params->shmem_base +
7926 pin_cfg = (REG_RD(bp, params->shmem_base +
8222 sync_offset = params->shmem_base +
8270 val = REG_RD(bp, params->shmem_base +
8535 u32 fault_led_gpio = REG_RD(bp, params->shmem_base +
8568 pin_cfg = (REG_RD(bp, params->shmem_base +
8690 u32 val = REG_RD(bp, params->shmem_base +
8751 if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base,
8984 tx_en_mode = REG_RD(bp, params->shmem_base +
9352 tx_en_mode = REG_RD(bp, params->shmem_base +
9380 u32 val = REG_RD(bp, params->shmem_base +
10153 pair_swap = REG_RD(bp, params->shmem_base +
10230 shmem_base_path[0] = params->shmem_base;
10403 u32 cms_enable = REG_RD(bp, params->shmem_base +
11053 cfg_pin = (REG_RD(bp, params->shmem_base +
11292 cfg_pin = (REG_RD(bp, params->shmem_base +
12146 static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,
12158 rx = REG_RD(bp, shmem_base +
12162 tx = REG_RD(bp, shmem_base +
12166 rx = REG_RD(bp, shmem_base +
12170 tx = REG_RD(bp, shmem_base +
12183 static u32 bnx2x_get_ext_phy_config(struct bnx2x *bp, u32 shmem_base,
12189 ext_phy_config = REG_RD(bp, shmem_base +
12194 ext_phy_config = REG_RD(bp, shmem_base +
12205 static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,
12210 u32 switch_cfg = (REG_RD(bp, shmem_base +
12228 serdes_net_if = (REG_RD(bp, shmem_base +
12338 bnx2x_populate_preemphasis(bp, shmem_base, phy, port, INT_PHY);
12344 u32 shmem_base,
12351 ext_phy_config = bnx2x_get_ext_phy_config(bp, shmem_base,
12418 bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);
12424 config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region,
12427 phy->ver_addr = shmem_base + offsetof(struct shmem_region,
12470 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,
12475 return bnx2x_populate_int_phy(bp, shmem_base, port, phy);
12477 return bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,
12489 link_config = REG_RD(bp, params->shmem_base +
12492 phy->speed_cap_mask = REG_RD(bp, params->shmem_base +
12497 link_config = REG_RD(bp, params->shmem_base +
12500 phy->speed_cap_mask = REG_RD(bp, params->shmem_base +
12612 if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,
12635 sync_offset = params->shmem_base +
13199 u32 shmem_base, shmem2_base;
13202 shmem_base = shmem_base_path[0];
13206 shmem_base = shmem_base_path[port];
13212 if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,
13326 u32 shmem_base, shmem2_base;
13330 shmem_base = shmem_base_path[0];
13333 shmem_base = shmem_base_path[port];
13337 if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,
13357 static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base,
13361 u32 phy_gpio_reset = REG_RD(bp, shmem_base +
13439 u32 shmem_base, shmem2_base;
13443 shmem_base = shmem_base_path[0];
13447 shmem_base = shmem_base_path[port];
13453 if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,
13622 cfg_pin = (REG_RD(bp, params->shmem_base +
13793 cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region,
13936 if ((REG_RD(bp, params->shmem_base +
13956 u32 shmem_base,
13964 if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,
13999 u32 chip_id, u32 shmem_base, u32 shmem2_base,
14007 shmem_base,
14016 if (bnx2x_populate_phy(bp, phy_index, shmem_base,
14043 sync_offset = shmem_base +