Lines Matching refs:bgmac
19 #include "bgmac.h"
21 static bool bgmac_wait_value(struct bgmac *bgmac, u16 reg, u32 mask,
28 val = bgmac_read(bgmac, reg);
33 dev_err(bgmac->dev, "Timeout waiting for reg 0x%X\n", reg);
41 static void bgmac_dma_tx_reset(struct bgmac *bgmac, struct bgmac_dma_ring *ring)
53 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL,
56 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
67 dev_err(bgmac->dev, "Timeout suspending DMA TX ring 0x%X (BGMAC_DMA_TX_STAT: 0x%08X)\n",
71 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, 0);
72 if (!bgmac_wait_value(bgmac,
76 dev_warn(bgmac->dev, "DMA TX ring 0x%X wasn't disabled on time, waiting additional 300us\n",
79 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
81 dev_err(bgmac->dev, "Reset of DMA TX ring 0x%X failed\n",
86 static void bgmac_dma_tx_enable(struct bgmac *bgmac,
91 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL);
92 if (bgmac->feature_flags & BGMAC_FEAT_TX_MASK_SETUP) {
107 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, ctl);
111 bgmac_dma_tx_add_buf(struct bgmac *bgmac, struct bgmac_dma_ring *ring,
131 static netdev_tx_t bgmac_dma_tx_add(struct bgmac *bgmac,
135 struct device *dma_dev = bgmac->dma_dev;
136 struct net_device *net_dev = bgmac->net_dev;
144 netdev_err(bgmac->net_dev, "Too long skb (%d)\n", skb->len);
157 netdev_err(bgmac->net_dev, "TX ring is full, queue should be stopped!\n");
171 bgmac_dma_tx_add_buf(bgmac, ring, index, skb_headlen(skb), flags);
188 bgmac_dma_tx_add_buf(bgmac, ring, index, len, flags);
200 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_INDEX,
224 netdev_err(bgmac->net_dev, "Mapping error of skb on ring 0x%X\n",
235 static void bgmac_dma_tx_free(struct bgmac *bgmac, struct bgmac_dma_ring *ring)
237 struct device *dma_dev = bgmac->dma_dev;
242 empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
269 bgmac->net_dev->stats.tx_bytes += slot->skb->len;
270 bgmac->net_dev->stats.tx_packets++;
286 netdev_completed_queue(bgmac->net_dev, pkts_compl, bytes_compl);
288 if (netif_queue_stopped(bgmac->net_dev))
289 netif_wake_queue(bgmac->net_dev);
292 static void bgmac_dma_rx_reset(struct bgmac *bgmac, struct bgmac_dma_ring *ring)
297 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, 0);
298 if (!bgmac_wait_value(bgmac,
302 dev_err(bgmac->dev, "Reset of ring 0x%X RX failed\n",
306 static void bgmac_dma_rx_enable(struct bgmac *bgmac,
311 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL);
316 if (bgmac->feature_flags & BGMAC_FEAT_RX_MASK_SETUP) {
330 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, ctl);
333 static int bgmac_dma_rx_skb_for_slot(struct bgmac *bgmac,
336 struct device *dma_dev = bgmac->dma_dev;
355 netdev_err(bgmac->net_dev, "DMA mapping error\n");
367 static void bgmac_dma_rx_update_index(struct bgmac *bgmac,
372 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_INDEX,
377 static void bgmac_dma_rx_setup_desc(struct bgmac *bgmac,
412 static int bgmac_dma_rx_read(struct bgmac *bgmac, struct bgmac_dma_ring *ring,
418 end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS);
425 struct device *dma_dev = bgmac->dma_dev;
435 if (bgmac_dma_rx_skb_for_slot(bgmac, slot)) {
450 netdev_err(bgmac->net_dev, "Found poisoned packet at slot %d, DMA issue!\n",
453 bgmac->net_dev->stats.rx_errors++;
458 netdev_err(bgmac->net_dev, "Found oversized packet at slot %d, DMA issue!\n",
461 bgmac->net_dev->stats.rx_length_errors++;
462 bgmac->net_dev->stats.rx_errors++;
471 netdev_err(bgmac->net_dev, "build_skb failed\n");
473 bgmac->net_dev->stats.rx_errors++;
482 skb->protocol = eth_type_trans(skb, bgmac->net_dev);
483 bgmac->net_dev->stats.rx_bytes += len;
484 bgmac->net_dev->stats.rx_packets++;
485 napi_gro_receive(&bgmac->napi, skb);
489 bgmac_dma_rx_setup_desc(bgmac, ring, ring->start);
498 bgmac_dma_rx_update_index(bgmac, ring);
504 static bool bgmac_dma_unaligned(struct bgmac *bgmac,
510 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO,
512 if (bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO))
516 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO,
518 if (bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO))
525 static void bgmac_dma_tx_ring_free(struct bgmac *bgmac,
528 struct device *dma_dev = bgmac->dma_dev;
552 static void bgmac_dma_rx_ring_free(struct bgmac *bgmac,
555 struct device *dma_dev = bgmac->dma_dev;
572 static void bgmac_dma_ring_desc_free(struct bgmac *bgmac,
576 struct device *dma_dev = bgmac->dma_dev;
588 static void bgmac_dma_cleanup(struct bgmac *bgmac)
593 bgmac_dma_tx_ring_free(bgmac, &bgmac->tx_ring[i]);
596 bgmac_dma_rx_ring_free(bgmac, &bgmac->rx_ring[i]);
599 static void bgmac_dma_free(struct bgmac *bgmac)
604 bgmac_dma_ring_desc_free(bgmac, &bgmac->tx_ring[i],
608 bgmac_dma_ring_desc_free(bgmac, &bgmac->rx_ring[i],
612 static int bgmac_dma_alloc(struct bgmac *bgmac)
614 struct device *dma_dev = bgmac->dma_dev;
624 if (!(bgmac->feature_flags & BGMAC_FEAT_IDM_MASK)) {
625 if (!(bgmac_idm_read(bgmac, BCMA_IOST) & BCMA_IOST_DMA64)) {
626 dev_err(bgmac->dev, "Core does not report 64-bit DMA\n");
632 ring = &bgmac->tx_ring[i];
641 dev_err(bgmac->dev, "Allocation of TX ring 0x%X failed\n",
646 ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
657 ring = &bgmac->rx_ring[i];
666 dev_err(bgmac->dev, "Allocation of RX ring 0x%X failed\n",
671 ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
682 bgmac_dma_free(bgmac);
686 static int bgmac_dma_init(struct bgmac *bgmac)
692 ring = &bgmac->tx_ring[i];
695 bgmac_dma_tx_enable(bgmac, ring);
696 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO,
698 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGHI,
701 bgmac_dma_tx_enable(bgmac, ring);
710 ring = &bgmac->rx_ring[i];
713 bgmac_dma_rx_enable(bgmac, ring);
714 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO,
716 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI,
719 bgmac_dma_rx_enable(bgmac, ring);
724 err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]);
728 bgmac_dma_rx_setup_desc(bgmac, ring, j);
731 bgmac_dma_rx_update_index(bgmac, ring);
737 bgmac_dma_cleanup(bgmac);
749 static void bgmac_umac_cmd_maskset(struct bgmac *bgmac, u32 mask, u32 set,
752 u32 cmdcfg = bgmac_umac_read(bgmac, UMAC_CMD);
756 if (bgmac->feature_flags & BGMAC_FEAT_CMDCFG_SR_REV4)
761 bgmac_umac_maskset(bgmac, UMAC_CMD, ~0, cmdcfg_sr);
765 bgmac_umac_write(bgmac, UMAC_CMD, new_val);
767 bgmac_umac_maskset(bgmac, UMAC_CMD, ~cmdcfg_sr, 0);
771 static void bgmac_write_mac_address(struct bgmac *bgmac, const u8 *addr)
776 bgmac_umac_write(bgmac, UMAC_MAC0, tmp);
778 bgmac_umac_write(bgmac, UMAC_MAC1, tmp);
783 struct bgmac *bgmac = netdev_priv(net_dev);
786 bgmac_umac_cmd_maskset(bgmac, ~0, CMD_PROMISC, true);
788 bgmac_umac_cmd_maskset(bgmac, ~CMD_PROMISC, 0, true);
792 static void bgmac_chip_stats_update(struct bgmac *bgmac)
796 if (!(bgmac->feature_flags & BGMAC_FEAT_NO_CLR_MIB)) {
798 bgmac->mib_tx_regs[i] =
799 bgmac_read(bgmac,
802 bgmac->mib_rx_regs[i] =
803 bgmac_read(bgmac,
811 static void bgmac_clear_mib(struct bgmac *bgmac)
815 if (bgmac->feature_flags & BGMAC_FEAT_NO_CLR_MIB)
818 bgmac_set(bgmac, BGMAC_DEV_CTL, BGMAC_DC_MROR);
820 bgmac_read(bgmac, BGMAC_TX_GOOD_OCTETS + (i * 4));
822 bgmac_read(bgmac, BGMAC_RX_GOOD_OCTETS + (i * 4));
826 static void bgmac_mac_speed(struct bgmac *bgmac)
831 switch (bgmac->mac_speed) {
845 dev_err(bgmac->dev, "Unsupported speed: %d\n",
846 bgmac->mac_speed);
849 if (bgmac->mac_duplex == DUPLEX_HALF)
852 bgmac_umac_cmd_maskset(bgmac, mask, set, true);
855 static void bgmac_miiconfig(struct bgmac *bgmac)
857 if (bgmac->feature_flags & BGMAC_FEAT_FORCE_SPEED_2500) {
858 if (!(bgmac->feature_flags & BGMAC_FEAT_IDM_MASK)) {
859 bgmac_idm_write(bgmac, BCMA_IOCTL,
860 bgmac_idm_read(bgmac, BCMA_IOCTL) |
863 bgmac->mac_speed = SPEED_2500;
864 bgmac->mac_duplex = DUPLEX_FULL;
865 bgmac_mac_speed(bgmac);
869 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
872 bgmac->mac_speed = SPEED_100;
873 bgmac->mac_duplex = DUPLEX_FULL;
874 bgmac_mac_speed(bgmac);
879 static void bgmac_chip_reset_idm_config(struct bgmac *bgmac)
883 iost = bgmac_idm_read(bgmac, BCMA_IOST);
884 if (bgmac->feature_flags & BGMAC_FEAT_IOST_ATTACHED)
888 if (!(bgmac->feature_flags & BGMAC_FEAT_NO_RESET)) {
893 if (bgmac->in_init || !bgmac->has_robosw)
896 bgmac_clk_enable(bgmac, flags);
899 if (iost & BGMAC_BCMA_IOST_ATTACHED && (bgmac->in_init || !bgmac->has_robosw))
900 bgmac_idm_write(bgmac, BCMA_IOCTL,
901 bgmac_idm_read(bgmac, BCMA_IOCTL) &
906 static void bgmac_chip_reset(struct bgmac *bgmac)
911 if (bgmac_clk_enabled(bgmac)) {
912 if (!bgmac->stats_grabbed) {
913 /* bgmac_chip_stats_update(bgmac); */
914 bgmac->stats_grabbed = true;
918 bgmac_dma_tx_reset(bgmac, &bgmac->tx_ring[i]);
920 bgmac_umac_cmd_maskset(bgmac, ~0, CMD_LCL_LOOP_EN, false);
924 bgmac_dma_rx_reset(bgmac, &bgmac->rx_ring[i]);
929 if (!(bgmac->feature_flags & BGMAC_FEAT_IDM_MASK))
930 bgmac_chip_reset_idm_config(bgmac);
933 if (bgmac->feature_flags & BGMAC_FEAT_MISC_PLL_REQ) {
934 bgmac_set(bgmac, BCMA_CLKCTLST,
936 bgmac_wait_value(bgmac, BCMA_CLKCTLST,
942 if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_PHY) {
950 dev_err(bgmac->dev, "Failed to parse et_swtype (%s)\n",
955 } else if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_EPHYRMII) {
958 } else if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_RGMII) {
962 bgmac_cco_ctl_maskset(bgmac, 1, ~(BGMAC_CHIPCTL_1_IF_TYPE_MASK |
965 } else if (bgmac->feature_flags & BGMAC_FEAT_CC4_IF_SW_TYPE) {
973 dev_err(bgmac->dev, "Failed to parse et_swtype (%s)\n",
976 } else if (bgmac->feature_flags & BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII) {
980 bgmac_cco_ctl_maskset(bgmac, 4, ~(BGMAC_CHIPCTL_4_IF_TYPE_MASK |
983 } else if (bgmac->feature_flags & BGMAC_FEAT_CC7_IF_TYPE_RGMII) {
984 bgmac_cco_ctl_maskset(bgmac, 7, ~BGMAC_CHIPCTL_7_IF_TYPE_MASK,
993 if (bgmac->feature_flags & BGMAC_FEAT_CMDCFG_SR_REV4)
998 bgmac_umac_cmd_maskset(bgmac,
1017 bgmac->mac_speed = SPEED_UNKNOWN;
1018 bgmac->mac_duplex = DUPLEX_UNKNOWN;
1020 bgmac_clear_mib(bgmac);
1021 if (bgmac->feature_flags & BGMAC_FEAT_CMN_PHY_CTL)
1022 bgmac_cmn_maskset32(bgmac, BCMA_GMAC_CMN_PHY_CTL, ~0,
1025 bgmac_set(bgmac, BGMAC_PHY_CNTL, BGMAC_PC_MTE);
1026 bgmac_miiconfig(bgmac);
1027 if (bgmac->mii_bus)
1028 bgmac->mii_bus->reset(bgmac->mii_bus);
1030 netdev_reset_queue(bgmac->net_dev);
1033 static void bgmac_chip_intrs_on(struct bgmac *bgmac)
1035 bgmac_write(bgmac, BGMAC_INT_MASK, bgmac->int_mask);
1038 static void bgmac_chip_intrs_off(struct bgmac *bgmac)
1040 bgmac_write(bgmac, BGMAC_INT_MASK, 0);
1041 bgmac_read(bgmac, BGMAC_INT_MASK);
1045 static void bgmac_enable(struct bgmac *bgmac)
1051 if (bgmac->feature_flags & BGMAC_FEAT_CMDCFG_SR_REV4)
1056 cmdcfg = bgmac_umac_read(bgmac, UMAC_CMD);
1057 bgmac_umac_cmd_maskset(bgmac, ~(CMD_TX_EN | CMD_RX_EN),
1061 bgmac_umac_write(bgmac, UMAC_CMD, cmdcfg);
1063 mode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
1065 if (bgmac->feature_flags & BGMAC_FEAT_CLKCTLST || mode != 0)
1066 bgmac_set(bgmac, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
1067 if (!(bgmac->feature_flags & BGMAC_FEAT_CLKCTLST) && mode == 2)
1068 bgmac_cco_ctl_maskset(bgmac, 1, ~0,
1071 if (bgmac->feature_flags & (BGMAC_FEAT_FLW_CTRL1 |
1075 if (bgmac->feature_flags & BGMAC_FEAT_FLW_CTRL1)
1080 bgmac_write(bgmac, BGMAC_FLOW_CTL_THRESH, fl_ctl);
1081 bgmac_umac_write(bgmac, UMAC_PAUSE_CTRL, 0x27fff);
1084 if (bgmac->feature_flags & BGMAC_FEAT_SET_RXQ_CLK) {
1089 rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
1091 bp_clk = bgmac_get_bus_clock(bgmac) / 1000000;
1094 bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
1099 static void bgmac_chip_init(struct bgmac *bgmac)
1102 bgmac_write(bgmac, BGMAC_INT_STATUS, ~0);
1105 bgmac_write(bgmac, BGMAC_INT_RECV_LAZY, 1 << BGMAC_IRL_FC_SHIFT);
1108 bgmac_umac_cmd_maskset(bgmac, ~CMD_RX_PAUSE_IGNORE, 0, true);
1110 bgmac_set_rx_mode(bgmac->net_dev);
1112 bgmac_write_mac_address(bgmac, bgmac->net_dev->dev_addr);
1114 if (bgmac->loopback)
1115 bgmac_umac_cmd_maskset(bgmac, ~0, CMD_LCL_LOOP_EN, false);
1117 bgmac_umac_cmd_maskset(bgmac, ~CMD_LCL_LOOP_EN, 0, false);
1119 bgmac_umac_write(bgmac, UMAC_MAX_FRAME_LEN, 32 + ETHER_MAX_LEN);
1121 bgmac_chip_intrs_on(bgmac);
1123 bgmac_enable(bgmac);
1128 struct bgmac *bgmac = netdev_priv(dev_id);
1130 u32 int_status = bgmac_read(bgmac, BGMAC_INT_STATUS);
1131 int_status &= bgmac->int_mask;
1138 dev_err(bgmac->dev, "Unknown IRQs: 0x%08X\n", int_status);
1141 bgmac_chip_intrs_off(bgmac);
1143 napi_schedule(&bgmac->napi);
1150 struct bgmac *bgmac = container_of(napi, struct bgmac, napi);
1154 bgmac_write(bgmac, BGMAC_INT_STATUS, ~0);
1156 bgmac_dma_tx_free(bgmac, &bgmac->tx_ring[0]);
1157 handled += bgmac_dma_rx_read(bgmac, &bgmac->rx_ring[0], weight);
1160 if (bgmac_read(bgmac, BGMAC_INT_STATUS) & (BGMAC_IS_TX0 | BGMAC_IS_RX))
1165 bgmac_chip_intrs_on(bgmac);
1177 struct bgmac *bgmac = netdev_priv(net_dev);
1180 bgmac_chip_reset(bgmac);
1182 err = bgmac_dma_init(bgmac);
1187 bgmac_chip_init(bgmac);
1189 err = request_irq(bgmac->irq, bgmac_interrupt, IRQF_SHARED,
1192 dev_err(bgmac->dev, "IRQ request error: %d!\n", err);
1193 bgmac_dma_cleanup(bgmac);
1196 napi_enable(&bgmac->napi);
1207 struct bgmac *bgmac = netdev_priv(net_dev);
1213 napi_disable(&bgmac->napi);
1214 bgmac_chip_intrs_off(bgmac);
1215 free_irq(bgmac->irq, net_dev);
1217 bgmac_chip_reset(bgmac);
1218 bgmac_dma_cleanup(bgmac);
1226 struct bgmac *bgmac = netdev_priv(net_dev);
1230 ring = &bgmac->tx_ring[0];
1231 return bgmac_dma_tx_add(bgmac, ring, skb);
1236 struct bgmac *bgmac = netdev_priv(net_dev);
1245 bgmac_write_mac_address(bgmac, net_dev->dev_addr);
1253 struct bgmac *bgmac = netdev_priv(net_dev);
1255 bgmac_umac_write(bgmac, UMAC_MAX_FRAME_LEN, 32 + mtu);
1377 struct bgmac *bgmac = netdev_priv(dev);
1389 val = (u64)bgmac_read(bgmac, s->offset + 4) << 32;
1390 val |= bgmac_read(bgmac, s->offset);
1417 struct bgmac *bgmac = netdev_priv(net_dev);
1422 if (phy_dev->speed != bgmac->mac_speed) {
1423 bgmac->mac_speed = phy_dev->speed;
1427 if (phy_dev->duplex != bgmac->mac_duplex) {
1428 bgmac->mac_duplex = phy_dev->duplex;
1434 bgmac_mac_speed(bgmac);
1440 int bgmac_phy_connect_direct(struct bgmac *bgmac)
1452 dev_err(bgmac->dev, "Failed to register fixed PHY device\n");
1456 err = phy_connect_direct(bgmac->net_dev, phy_dev, bgmac_adjust_link,
1459 dev_err(bgmac->dev, "Connecting PHY failed\n");
1467 struct bgmac *bgmac_alloc(struct device *dev)
1470 struct bgmac *bgmac;
1473 net_dev = devm_alloc_etherdev(dev, sizeof(*bgmac));
1480 bgmac = netdev_priv(net_dev);
1481 bgmac->dev = dev;
1482 bgmac->net_dev = net_dev;
1484 return bgmac;
1488 int bgmac_enet_probe(struct bgmac *bgmac)
1490 struct net_device *net_dev = bgmac->net_dev;
1493 bgmac->in_init = true;
1495 net_dev->irq = bgmac->irq;
1496 SET_NETDEV_DEV(net_dev, bgmac->dev);
1497 dev_set_drvdata(bgmac->dev, bgmac);
1500 dev_err(bgmac->dev, "Invalid MAC addr: %pM\n",
1503 dev_warn(bgmac->dev, "Using random MAC: %pM\n",
1510 bgmac_clk_enable(bgmac, 0);
1512 bgmac_chip_intrs_off(bgmac);
1515 if (!(bgmac->feature_flags & BGMAC_FEAT_IDM_MASK)) {
1516 if (bgmac->feature_flags & BGMAC_FEAT_IRQ_ID_OOB_6)
1517 bgmac_idm_write(bgmac, BCMA_OOB_SEL_OUT_A30, 0x86);
1520 bgmac_chip_reset(bgmac);
1522 err = bgmac_dma_alloc(bgmac);
1524 dev_err(bgmac->dev, "Unable to alloc memory for DMA\n");
1528 bgmac->int_mask = BGMAC_IS_ERRMASK | BGMAC_IS_RX | BGMAC_IS_TX_MASK;
1530 bgmac->int_mask &= ~BGMAC_IS_TX_MASK;
1532 netif_napi_add(net_dev, &bgmac->napi, bgmac_poll);
1534 err = bgmac_phy_connect(bgmac);
1536 dev_err(bgmac->dev, "Cannot connect to phy\n");
1547 bgmac->in_init = false;
1549 err = register_netdev(bgmac->net_dev);
1551 dev_err(bgmac->dev, "Cannot register net device\n");
1562 bgmac_dma_free(bgmac);
1569 void bgmac_enet_remove(struct bgmac *bgmac)
1571 unregister_netdev(bgmac->net_dev);
1572 phy_disconnect(bgmac->net_dev->phydev);
1573 netif_napi_del(&bgmac->napi);
1574 bgmac_dma_free(bgmac);
1578 int bgmac_enet_suspend(struct bgmac *bgmac)
1580 if (!netif_running(bgmac->net_dev))
1583 phy_stop(bgmac->net_dev->phydev);
1585 netif_stop_queue(bgmac->net_dev);
1587 napi_disable(&bgmac->napi);
1589 netif_tx_lock(bgmac->net_dev);
1590 netif_device_detach(bgmac->net_dev);
1591 netif_tx_unlock(bgmac->net_dev);
1593 bgmac_chip_intrs_off(bgmac);
1594 bgmac_chip_reset(bgmac);
1595 bgmac_dma_cleanup(bgmac);
1601 int bgmac_enet_resume(struct bgmac *bgmac)
1605 if (!netif_running(bgmac->net_dev))
1608 rc = bgmac_dma_init(bgmac);
1612 bgmac_chip_init(bgmac);
1614 napi_enable(&bgmac->napi);
1616 netif_tx_lock(bgmac->net_dev);
1617 netif_device_attach(bgmac->net_dev);
1618 netif_tx_unlock(bgmac->net_dev);
1620 netif_start_queue(bgmac->net_dev);
1622 phy_start(bgmac->net_dev->phydev);