ethernet/broadcom/bgmac-bcma-mdio.c

2  * Driver for (BCM4706)? GBit MAC core on BCMA bus.
16 static bool bcma_mdio_wait_value(struct bcma_device *core, u16 reg, u32 mask,
23 		val = bcma_read32(core, reg);
28 	dev_err(&core->dev, "Timeout waiting for reg 0x%X\n", reg);
38 	struct bcma_device *core;
55 	if (bgmac->bcma.core->id.id == BCMA_CORE_4706_MAC_GBIT) {
56 		core = bgmac->bcma.core->bus->drv_gmac_cmn.core;
60 		core = bgmac->bcma.core;
65 	tmp = bcma_read32(core, phy_ctl_addr);
68 	bcma_write32(core, phy_ctl_addr, tmp);
73 	bcma_write32(core, phy_access_addr, tmp);
75 	if (!bcma_mdio_wait_value(core, phy_access_addr, BGMAC_PA_START, 0,
77 		dev_err(&core->dev, "Reading PHY %d register 0x%X failed\n",
82 	return bcma_read32(core, phy_access_addr) & BGMAC_PA_DATA_MASK;
89 	struct bcma_device *core;
94 	if (bgmac->bcma.core->id.id == BCMA_CORE_4706_MAC_GBIT) {
95 		core = bgmac->bcma.core->bus->drv_gmac_cmn.core;
99 		core = bgmac->bcma.core;
104 	tmp = bcma_read32(core, phy_ctl_addr);
107 	bcma_write32(core, phy_ctl_addr, tmp);
109 	bcma_write32(bgmac->bcma.core, BGMAC_INT_STATUS, BGMAC_IS_MDIO);
110 	if (bcma_read32(bgmac->bcma.core, BGMAC_INT_STATUS) & BGMAC_IS_MDIO)
111 		dev_warn(&core->dev, "Error setting MDIO int\n");
118 	bcma_write32(core, phy_access_addr, tmp);
120 	if (!bcma_mdio_wait_value(core, phy_access_addr, BGMAC_PA_START, 0,
122 		dev_err(&core->dev, "Writing to PHY %d register 0x%X failed\n",
133 	struct bcma_chipinfo *ci = &bgmac->bcma.core->bus->chipinfo;
153 		struct bcma_drv_cc *cc = &bgmac->bcma.core->bus->drv_cc;
213 	struct bcma_device *core = bgmac->bcma.core;
225 	sprintf(mii_bus->id, "%s-%d-%d", "bcma_mdio", core->bus->num,
226 		core->core_unit);
231 	mii_bus->parent = &core->dev;
234 	np = of_get_child_by_name(core->dev.of_node, "mdio");
239 		dev_err(&core->dev, "Registration of mii bus failed\n");