atlantic/hw_atl/hw_atl_llh_internal.h

183  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
188 #define HW_ATL_RDM_DESCDDATA_SIZE_ADR(descriptor) \
189 	(0x00005b18 + (descriptor) * 0x20)
222  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
227 #define HW_ATL_RDM_DESCDEN_ADR(descriptor) (0x00005b08 + (descriptor) * 0x20)
241  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
246 #define HW_ATL_RDM_DESCDHDR_SIZE_ADR(descriptor) \
247 	(0x00005b18 + (descriptor) * 0x20)
261  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
266 #define HW_ATL_RDM_DESCDHDR_SPLIT_ADR(descriptor) \
267 	(0x00005b08 + (descriptor) * 0x20)
281  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
286 #define HW_ATL_RDM_DESCDHD_ADR(descriptor) (0x00005b0c + (descriptor) * 0x20)
298  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
303 #define HW_ATL_RDM_DESCDLEN_ADR(descriptor) (0x00005b08 + (descriptor) * 0x20)
317  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
322 #define HW_ATL_RDM_DESCDRESET_ADR(descriptor) (0x00005b08 + (descriptor) * 0x20)
472 /* rx dma descriptor base address lsw definitions
473  * preprocessor definitions for rx dma descriptor base address lsw
475  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
477 #define HW_ATL_RX_DMA_DESC_BASE_ADDRLSW_ADR(descriptor) \
478 (0x00005b00u + (descriptor) * 0x20)
480 /* rx dma descriptor base address msw definitions
481  * preprocessor definitions for rx dma descriptor base address msw
483  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
485 #define HW_ATL_RX_DMA_DESC_BASE_ADDRMSW_ADR(descriptor) \
486 (0x00005b04u + (descriptor) * 0x20)
488 /* rx dma descriptor status register definitions
489  * preprocessor definitions for rx dma descriptor status register
491  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
493 #define HW_ATL_RX_DMA_DESC_STAT_ADR(descriptor) \
494 	(0x00005b14u + (descriptor) * 0x20)
496 /* rx dma descriptor tail pointer register definitions
497  * preprocessor definitions for rx dma descriptor tail pointer register
499  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
501 #define HW_ATL_RX_DMA_DESC_TAIL_PTR_ADR(descriptor) \
502 	(0x00005b10u + (descriptor) * 0x20)
554 /* tx dma descriptor base address lsw definitions
555  * preprocessor definitions for tx dma descriptor base address lsw
557  * parameter: descriptor {d} | stride size 0x40 | range [0, 31]
559 #define HW_ATL_TX_DMA_DESC_BASE_ADDRLSW_ADR(descriptor) \
560 	(0x00007c00u + (descriptor) * 0x40)
562 /* tx dma descriptor tail pointer register definitions
563  * preprocessor definitions for tx dma descriptor tail pointer register
565  *  parameter: descriptor {d} | stride size 0x40 | range [0, 31]
567 #define HW_ATL_TX_DMA_DESC_TAIL_PTR_ADR(descriptor) \
568 	(0x00007c10u + (descriptor) * 0x40)
1464  * parameter: descriptor {d} | stride size 0x20 | range [0, 31]
1469 #define HW_ATL_RPO_DESCDVL_STRIP_ADR(descriptor) \
1470 	(0x00005b08 + (descriptor) * 0x20)
1630  * parameter: descriptor {d} | stride size 0x40 | range [0, 31]
1635 #define HW_ATL_TDM_DESCDEN_ADR(descriptor) (0x00007c08 + (descriptor) * 0x40)
1649  * parameter: descriptor {d} | stride size 0x40 | range [0, 31]
1654 #define HW_ATL_TDM_DESCDHD_ADR(descriptor) (0x00007c0c + (descriptor) * 0x40)
1666  * parameter: descriptor {d} | stride size 0x40 | range [0, 31]
1671 #define HW_ATL_TDM_DESCDLEN_ADR(descriptor) (0x00007c08 + (descriptor) * 0x40)
1703  * parameter: descriptor {d} | stride size 0x40 | range [0, 31]
1708 #define HW_ATL_TDM_DESCDWRB_THRESH_ADR(descriptor) \
1709 	(0x00007c18 + (descriptor) * 0x40)
1964  * Parameter: descriptor {D} | stride size 0x40 | range [0, 31]
1969 #define HW_ATL_TDM_DESC_DEN_ADR(descriptor) (0x00007C08 + (descriptor) * 0x40)
1983  * Parameter: descriptor {D} | stride size 0x40 | range [0, 31]
1988 #define HW_ATL_TDM_DESC_DHD_ADR(descriptor) (0x00007C0C + (descriptor) * 0x40)
2000  * Parameter: descriptor {D} | stride size 0x40 | range [0, 31]
2005 #define HW_ATL_TDM_DESC_DLEN_ADR(descriptor) (0x00007C08 + (descriptor) * 0x40)
2019  * Parameter: descriptor {D} | stride size 0x40 | range [0, 31]
2024 #define HW_ATL_TDM_DESC_DWRB_THRESH_ADR(descriptor) \
2025 	(0x00007C18 + (descriptor) * 0x40)
2704 /* tx dma descriptor base address msw definitions */
2705 #define HW_ATL_TX_DMA_DESC_BASE_ADDRMSW_ADR(descriptor) \
2706 			(0x00007c04u + (descriptor) * 0x40)