Lines Matching refs:phy_data
405 struct xgbe_phy_data *phy_data = pdata->phy_data;
430 i2c_op.target = phy_data->redrv_addr;
444 i2c_op.target = phy_data->redrv_addr;
522 struct xgbe_phy_data *phy_data = pdata->phy_data;
526 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT)
532 i2c_op.target = phy_data->sfp_mux_address;
541 struct xgbe_phy_data *phy_data = pdata->phy_data;
545 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT)
549 mux_channel = 1 << phy_data->sfp_mux_channel;
551 i2c_op.target = phy_data->sfp_mux_address;
565 struct xgbe_phy_data *phy_data = pdata->phy_data;
581 XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data->port_id);
610 struct xgbe_phy_data *phy_data = pdata->phy_data;
612 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22)
621 struct xgbe_phy_data *phy_data = pdata->phy_data;
623 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45)
656 struct xgbe_phy_data *phy_data = pdata->phy_data;
663 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
665 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO)
679 struct xgbe_phy_data *phy_data = pdata->phy_data;
686 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
688 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO)
701 struct xgbe_phy_data *phy_data = pdata->phy_data;
703 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22)
712 struct xgbe_phy_data *phy_data = pdata->phy_data;
714 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45)
745 struct xgbe_phy_data *phy_data = pdata->phy_data;
752 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
754 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO)
768 struct xgbe_phy_data *phy_data = pdata->phy_data;
775 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
777 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO)
790 struct xgbe_phy_data *phy_data = pdata->phy_data;
792 if (!phy_data->sfp_mod_absent && !phy_data->sfp_changed)
797 if (phy_data->sfp_mod_absent) {
814 switch (phy_data->sfp_base) {
826 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) {
827 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10)
829 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100)
831 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
834 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
847 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) {
848 switch (phy_data->sfp_base) {
877 switch (phy_data->sfp_base) {
914 struct xgbe_phy_data *phy_data = pdata->phy_data;
916 if (phy_data->phydev) {
917 phy_detach(phy_data->phydev);
918 phy_device_remove(phy_data->phydev);
919 phy_device_free(phy_data->phydev);
920 phy_data->phydev = NULL;
927 struct xgbe_phy_data *phy_data = pdata->phy_data;
928 unsigned int phy_id = phy_data->phydev->phy_id;
930 if (phy_data->port_mode != XGBE_PORT_MODE_SFP)
937 phy_write(phy_data->phydev, 0x16, 0x0001);
938 phy_write(phy_data->phydev, 0x00, 0x9140);
939 phy_write(phy_data->phydev, 0x16, 0x0000);
942 phy_write(phy_data->phydev, 0x1b, 0x9084);
943 phy_write(phy_data->phydev, 0x09, 0x0e00);
944 phy_write(phy_data->phydev, 0x00, 0x8140);
945 phy_write(phy_data->phydev, 0x04, 0x0d01);
946 phy_write(phy_data->phydev, 0x00, 0x9140);
955 linkmode_copy(phy_data->phydev->supported, supported);
957 phy_support_asym_pause(phy_data->phydev);
968 struct xgbe_phy_data *phy_data = pdata->phy_data;
969 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom;
970 unsigned int phy_id = phy_data->phydev->phy_id;
973 if (phy_data->port_mode != XGBE_PORT_MODE_SFP)
991 genphy_soft_reset(phy_data->phydev);
994 phy_write(phy_data->phydev, 0x18, 0x7007);
995 reg = phy_read(phy_data->phydev, 0x18);
996 phy_write(phy_data->phydev, 0x18, reg & ~0x0080);
999 phy_write(phy_data->phydev, 0x1c, 0x7c00);
1000 reg = phy_read(phy_data->phydev, 0x1c);
1003 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0001);
1006 reg = phy_read(phy_data->phydev, 0x00);
1007 phy_write(phy_data->phydev, 0x00, reg | 0x00800);
1010 phy_write(phy_data->phydev, 0x1c, 0x7c00);
1011 reg = phy_read(phy_data->phydev, 0x1c);
1014 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0004);
1017 reg = phy_read(phy_data->phydev, 0x00);
1018 phy_write(phy_data->phydev, 0x00, reg & ~0x00800);
1021 phy_write(phy_data->phydev, 0x1c, 0x7c00);
1022 reg = phy_read(phy_data->phydev, 0x1c);
1025 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg);
1028 reg = phy_read(phy_data->phydev, 0x00);
1029 phy_write(phy_data->phydev, 0x00, reg & ~0x00800);
1037 linkmode_copy(phy_data->phydev->supported, supported);
1038 phy_support_asym_pause(phy_data->phydev);
1058 struct xgbe_phy_data *phy_data = pdata->phy_data;
1063 if (phy_data->phydev)
1070 if (phy_data->phydev_mode == XGBE_MDIO_MODE_NONE)
1074 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) &&
1075 !phy_data->sfp_phy_avail)
1079 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr,
1080 phy_data->phydev_mode);
1084 phy_data->mdio_addr, phy_data->phydev_mode);
1089 phydev = get_phy_device(phy_data->mii, phy_data->mdio_addr,
1090 (phy_data->phydev_mode == XGBE_MDIO_MODE_CL45));
1115 phy_data->phydev = phydev;
1122 phy_start_aneg(phy_data->phydev);
1129 struct xgbe_phy_data *phy_data = pdata->phy_data;
1132 if (!phy_data->sfp_changed)
1135 phy_data->sfp_phy_avail = 0;
1137 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T)
1146 phy_data->sfp_phy_avail = 1;
1149 static bool xgbe_phy_check_sfp_rx_los(struct xgbe_phy_data *phy_data)
1151 u8 *sfp_extd = phy_data->sfp_eeprom.extd;
1156 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_RX_LOS)
1159 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_rx_los))
1165 static bool xgbe_phy_check_sfp_tx_fault(struct xgbe_phy_data *phy_data)
1167 u8 *sfp_extd = phy_data->sfp_eeprom.extd;
1172 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_TX_FAULT)
1175 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_tx_fault))
1181 static bool xgbe_phy_check_sfp_mod_absent(struct xgbe_phy_data *phy_data)
1183 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_MOD_ABSENT)
1186 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_mod_absent))
1194 struct xgbe_phy_data *phy_data = pdata->phy_data;
1195 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom;
1207 phy_data->sfp_tx_fault = xgbe_phy_check_sfp_tx_fault(phy_data);
1208 phy_data->sfp_rx_los = xgbe_phy_check_sfp_rx_los(phy_data);
1212 phy_data->sfp_cable = XGBE_SFP_CABLE_PASSIVE;
1213 phy_data->sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN];
1215 phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE;
1217 phy_data->sfp_cable = XGBE_SFP_CABLE_FIBER;
1221 if (phy_data->sfp_cable != XGBE_SFP_CABLE_FIBER &&
1223 phy_data->sfp_base = XGBE_SFP_BASE_10000_CR;
1225 phy_data->sfp_base = XGBE_SFP_BASE_10000_SR;
1227 phy_data->sfp_base = XGBE_SFP_BASE_10000_LR;
1229 phy_data->sfp_base = XGBE_SFP_BASE_10000_LRM;
1231 phy_data->sfp_base = XGBE_SFP_BASE_10000_ER;
1233 phy_data->sfp_base = XGBE_SFP_BASE_1000_SX;
1235 phy_data->sfp_base = XGBE_SFP_BASE_1000_LX;
1237 phy_data->sfp_base = XGBE_SFP_BASE_1000_CX;
1239 phy_data->sfp_base = XGBE_SFP_BASE_1000_T;
1241 switch (phy_data->sfp_base) {
1243 phy_data->sfp_speed = XGBE_SFP_SPEED_100_1000;
1248 phy_data->sfp_speed = XGBE_SFP_SPEED_1000;
1255 phy_data->sfp_speed = XGBE_SFP_SPEED_10000;
1306 struct xgbe_phy_data *phy_data = pdata->phy_data;
1345 if (memcmp(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom))) {
1346 phy_data->sfp_changed = 1;
1351 memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom));
1355 phy_data->sfp_changed = 0;
1366 struct xgbe_phy_data *phy_data = pdata->phy_data;
1372 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address,
1381 phy_data->sfp_gpio_inputs = (gpio_ports[1] << 8) | gpio_ports[0];
1383 phy_data->sfp_mod_absent = xgbe_phy_check_sfp_mod_absent(phy_data);
1388 struct xgbe_phy_data *phy_data = pdata->phy_data;
1392 phy_data->sfp_mod_absent = 1;
1393 phy_data->sfp_phy_avail = 0;
1394 memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom));
1397 static void xgbe_phy_sfp_reset(struct xgbe_phy_data *phy_data)
1399 phy_data->sfp_rx_los = 0;
1400 phy_data->sfp_tx_fault = 0;
1401 phy_data->sfp_mod_absent = 1;
1402 phy_data->sfp_base = XGBE_SFP_BASE_UNKNOWN;
1403 phy_data->sfp_cable = XGBE_SFP_CABLE_UNKNOWN;
1404 phy_data->sfp_speed = XGBE_SFP_SPEED_UNKNOWN;
1409 struct xgbe_phy_data *phy_data = pdata->phy_data;
1413 xgbe_phy_sfp_reset(phy_data);
1421 if (phy_data->sfp_mod_absent) {
1429 xgbe_phy_sfp_reset(phy_data);
1447 struct xgbe_phy_data *phy_data = pdata->phy_data;
1465 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) {
1475 if (phy_data->sfp_mod_absent) {
1546 struct xgbe_phy_data *phy_data = pdata->phy_data;
1548 if (phy_data->port_mode != XGBE_PORT_MODE_SFP)
1554 if (phy_data->sfp_mod_absent)
1557 if (XGBE_SFP_DIAGS_SUPPORTED(&phy_data->sfp_eeprom)) {
1571 struct xgbe_phy_data *phy_data = pdata->phy_data;
1578 if (!phy_data->phydev)
1581 lcl_adv = linkmode_adv_to_lcl_adv_t(phy_data->phydev->advertising);
1583 if (phy_data->phydev->pause) {
1587 if (phy_data->phydev->asym_pause) {
1695 struct xgbe_phy_data *phy_data = pdata->phy_data;
1716 switch (phy_data->port_mode) {
1726 switch (phy_data->port_mode) {
1735 switch (phy_data->sfp_base) {
1737 if (phy_data->phydev &&
1738 (phy_data->phydev->speed == SPEED_10))
1740 else if (phy_data->phydev &&
1741 (phy_data->phydev->speed == SPEED_100))
1755 if (phy_data->phydev &&
1756 (phy_data->phydev->speed == SPEED_10))
1758 else if (phy_data->phydev &&
1759 (phy_data->phydev->speed == SPEED_100))
1856 struct xgbe_phy_data *phy_data = pdata->phy_data;
1861 if (!phy_data->redrv)
1872 switch (phy_data->port_mode) {
1886 if (phy_data->phydev &&
1887 (phy_data->phydev->speed == SPEED_10000))
1889 else if (phy_data->phydev &&
1890 (phy_data->phydev->speed == SPEED_2500))
1899 switch (phy_data->sfp_base) {
1920 struct xgbe_phy_data *phy_data = pdata->phy_data;
1927 if (!phy_data->phydev)
1930 phy_data->phydev->autoneg = pdata->phy.autoneg;
1931 linkmode_and(phy_data->phydev->advertising,
1932 phy_data->phydev->supported,
1936 phy_data->phydev->speed = pdata->phy.speed;
1937 phy_data->phydev->duplex = pdata->phy.duplex;
1940 ret = phy_start_aneg(phy_data->phydev);
1945 static enum xgbe_an_mode xgbe_phy_an_sfp_mode(struct xgbe_phy_data *phy_data)
1947 switch (phy_data->sfp_base) {
1961 struct xgbe_phy_data *phy_data = pdata->phy_data;
1964 if (phy_data->redrv)
1967 switch (phy_data->port_mode) {
1984 return xgbe_phy_an_sfp_mode(phy_data);
1993 struct xgbe_phy_data *phy_data = pdata->phy_data;
1996 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000);
1999 return pdata->hw_if.write_ext_mii_regs_c22(pdata, phy_data->redrv_addr,
2006 struct xgbe_phy_data *phy_data = pdata->phy_data;
2011 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000);
2020 struct xgbe_phy_data *phy_data = pdata->phy_data;
2024 if (!phy_data->redrv)
2028 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) &&
2029 (phy_data->sfp_base != XGBE_SFP_BASE_1000_CX) &&
2030 (phy_data->sfp_base != XGBE_SFP_BASE_10000_CR))
2037 if (phy_data->redrv_if)
2066 struct xgbe_phy_data *phy_data = pdata->phy_data;
2105 xgbe_set_rx_adap_mode(pdata, phy_data->cur_mode);
2239 struct xgbe_phy_data *phy_data = pdata->phy_data;
2244 phy_data->cur_mode = XGBE_MODE_UNKNOWN;
2251 struct xgbe_phy_data *phy_data = pdata->phy_data;
2260 if (phy_data->redrv &&
2261 (phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4223 ||
2262 phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4227))
2267 phy_data->port_mode != XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG)
2276 struct xgbe_phy_data *phy_data = pdata->phy_data;
2281 if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) {
2284 } else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) &&
2289 if (phy_data->sfp_cable_len <= 1)
2292 else if (phy_data->sfp_cable_len <= 3)
2300 phy_data->cur_mode = XGBE_MODE_SFI;
2307 struct xgbe_phy_data *phy_data = pdata->phy_data;
2314 phy_data->cur_mode = XGBE_MODE_X;
2321 struct xgbe_phy_data *phy_data = pdata->phy_data;
2328 phy_data->cur_mode = XGBE_MODE_SGMII_1000;
2335 struct xgbe_phy_data *phy_data = pdata->phy_data;
2342 phy_data->cur_mode = XGBE_MODE_SGMII_100;
2349 struct xgbe_phy_data *phy_data = pdata->phy_data;
2356 phy_data->cur_mode = XGBE_MODE_SGMII_10;
2363 struct xgbe_phy_data *phy_data = pdata->phy_data;
2375 phy_data->cur_mode = XGBE_MODE_KR;
2382 struct xgbe_phy_data *phy_data = pdata->phy_data;
2389 phy_data->cur_mode = XGBE_MODE_KX_2500;
2396 struct xgbe_phy_data *phy_data = pdata->phy_data;
2403 phy_data->cur_mode = XGBE_MODE_KX_1000;
2410 struct xgbe_phy_data *phy_data = pdata->phy_data;
2412 return phy_data->cur_mode;
2417 struct xgbe_phy_data *phy_data = pdata->phy_data;
2420 if (phy_data->port_mode != XGBE_PORT_MODE_10GBASE_T)
2455 struct xgbe_phy_data *phy_data = pdata->phy_data;
2457 switch (phy_data->port_mode) {
2477 static enum xgbe_mode xgbe_phy_get_basex_mode(struct xgbe_phy_data *phy_data,
2490 static enum xgbe_mode xgbe_phy_get_baset_mode(struct xgbe_phy_data *phy_data,
2509 static enum xgbe_mode xgbe_phy_get_sfp_mode(struct xgbe_phy_data *phy_data,
2518 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T)
2555 struct xgbe_phy_data *phy_data = pdata->phy_data;
2557 switch (phy_data->port_mode) {
2566 return xgbe_phy_get_baset_mode(phy_data, speed);
2569 return xgbe_phy_get_basex_mode(phy_data, speed);
2571 return xgbe_phy_get_sfp_mode(phy_data, speed);
2672 struct xgbe_phy_data *phy_data = pdata->phy_data;
2676 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T)
2681 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T)
2686 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T)
2691 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T)
2696 if (phy_data->sfp_mod_absent)
2742 struct xgbe_phy_data *phy_data = pdata->phy_data;
2744 switch (phy_data->port_mode) {
2764 static bool xgbe_phy_valid_speed_basex_mode(struct xgbe_phy_data *phy_data,
2769 return (phy_data->port_mode == XGBE_PORT_MODE_1000BASE_X);
2771 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_R);
2780 struct xgbe_phy_data *phy_data = pdata->phy_data;
2792 return ((phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) ||
2793 (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T));
2795 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T);
2804 struct xgbe_phy_data *phy_data = pdata->phy_data;
2812 (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000));
2814 return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000);
2816 return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000) ||
2817 (phy_data->sfp_speed == XGBE_SFP_SPEED_1000));
2819 return (phy_data->sfp_speed == XGBE_SFP_SPEED_10000);
2848 struct xgbe_phy_data *phy_data = pdata->phy_data;
2850 switch (phy_data->port_mode) {
2862 return xgbe_phy_valid_speed_basex_mode(phy_data, speed);
2872 struct xgbe_phy_data *phy_data = pdata->phy_data;
2878 if (phy_data->port_mode == XGBE_PORT_MODE_SFP) {
2882 if (phy_data->sfp_changed) {
2887 if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) {
2894 if (phy_data->phydev) {
2896 ret = phy_read_status(phy_data->phydev);
2901 !phy_aneg_done(phy_data->phydev))
2904 if (!phy_data->phydev->link)
2928 xgbe_phy_set_mode(pdata, phy_data->cur_mode);
2939 phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE) {
2947 if (pdata->vdata->enable_rrc && phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) {
2948 phy_data->rrc_count = 0;
2957 struct xgbe_phy_data *phy_data = pdata->phy_data;
2959 phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 +
2963 phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2966 phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2968 phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2970 phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2972 phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3,
2977 phy_data->sfp_gpio_address);
2979 phy_data->sfp_gpio_mask);
2981 phy_data->sfp_gpio_rx_los);
2983 phy_data->sfp_gpio_tx_fault);
2985 phy_data->sfp_gpio_mod_absent);
2987 phy_data->sfp_gpio_rate_select);
2993 struct xgbe_phy_data *phy_data = pdata->phy_data;
3001 phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545;
3002 phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo;
3003 phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4,
3008 phy_data->sfp_mux_address);
3010 phy_data->sfp_mux_channel);
3022 struct xgbe_phy_data *phy_data = pdata->phy_data;
3025 ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio);
3029 ret = pdata->hw_if.clr_gpio(pdata, phy_data->mdio_reset_gpio);
3036 struct xgbe_phy_data *phy_data = pdata->phy_data;
3042 ret = xgbe_phy_i2c_read(pdata, phy_data->mdio_reset_addr,
3054 if (phy_data->mdio_reset_gpio < 8)
3055 gpio_data[1] |= (1 << (phy_data->mdio_reset_gpio % 8));
3057 gpio_data[2] |= (1 << (phy_data->mdio_reset_gpio % 8));
3060 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr,
3066 if (phy_data->mdio_reset_gpio < 8)
3067 gpio_data[1] &= ~(1 << (phy_data->mdio_reset_gpio % 8));
3069 gpio_data[2] &= ~(1 << (phy_data->mdio_reset_gpio % 8));
3072 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr,
3080 struct xgbe_phy_data *phy_data = pdata->phy_data;
3083 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO)
3090 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO)
3092 else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO)
3100 static bool xgbe_phy_redrv_error(struct xgbe_phy_data *phy_data)
3102 if (!phy_data->redrv)
3105 if (phy_data->redrv_if >= XGBE_PHY_REDRV_IF_MAX)
3108 switch (phy_data->redrv_model) {
3110 if (phy_data->redrv_lane > 3)
3114 if (phy_data->redrv_lane > 1)
3126 struct xgbe_phy_data *phy_data = pdata->phy_data;
3128 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO)
3131 phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET);
3132 switch (phy_data->mdio_reset) {
3139 phy_data->mdio_reset);
3143 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) {
3144 phy_data->mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 +
3147 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,
3149 } else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) {
3150 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,
3159 struct xgbe_phy_data *phy_data = pdata->phy_data;
3164 if ((ver < 0x30 && ver != 0x21) && (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10))
3167 switch (phy_data->port_mode) {
3170 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
3171 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
3175 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)
3179 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ||
3180 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
3181 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000))
3185 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
3189 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ||
3190 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
3191 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
3192 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500))
3196 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ||
3197 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
3198 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
3199 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) ||
3200 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
3204 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)
3208 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ||
3209 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
3210 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
3211 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
3223 struct xgbe_phy_data *phy_data = pdata->phy_data;
3225 switch (phy_data->port_mode) {
3229 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE)
3237 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO)
3241 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
3263 struct xgbe_phy_data *phy_data = pdata->phy_data;
3268 if (!phy_data->phy_cdr_notrack)
3271 usleep_range(phy_data->phy_cdr_delay,
3272 phy_data->phy_cdr_delay + 500);
3278 phy_data->phy_cdr_notrack = 0;
3283 struct xgbe_phy_data *phy_data = pdata->phy_data;
3288 if (phy_data->phy_cdr_notrack)
3297 phy_data->phy_cdr_notrack = 1;
3314 struct xgbe_phy_data *phy_data = pdata->phy_data;
3319 if (phy_data->cur_mode != XGBE_MODE_KR)
3329 if (phy_data->phy_cdr_delay < XGBE_CDR_DELAY_MAX)
3330 phy_data->phy_cdr_delay += XGBE_CDR_DELAY_INC;
3332 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT;
3343 struct xgbe_phy_data *phy_data = pdata->phy_data;
3348 if (phy_data->cur_mode != XGBE_MODE_KR)
3360 struct xgbe_phy_data *phy_data = pdata->phy_data;
3366 xgbe_phy_sfp_reset(phy_data);
3381 struct xgbe_phy_data *phy_data = pdata->phy_data;
3390 if (phy_data->redrv && !phy_data->redrv_if) {
3391 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr,
3396 phy_data->redrv_addr);
3402 xgbe_phy_set_mode(pdata, phy_data->start_mode);
3408 switch (phy_data->port_mode) {
3431 struct xgbe_phy_data *phy_data = pdata->phy_data;
3436 cur_mode = phy_data->cur_mode;
3440 if (!phy_data->phydev)
3448 return phy_init_hw(phy_data->phydev);
3453 struct xgbe_phy_data *phy_data = pdata->phy_data;
3456 mdiobus_unregister(phy_data->mii);
3462 struct xgbe_phy_data *phy_data;
3477 phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL);
3478 if (!phy_data)
3480 pdata->phy_data = phy_data;
3482 phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE);
3483 phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID);
3484 phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS);
3485 phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE);
3486 phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR);
3488 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode);
3489 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id);
3490 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds);
3491 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type);
3492 dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr);
3495 phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT);
3496 phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF);
3497 phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR);
3498 phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE);
3499 phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL);
3500 if (phy_data->redrv && netif_msg_probe(pdata)) {
3502 dev_dbg(pdata->dev, "redrv i/f=%u\n", phy_data->redrv_if);
3503 dev_dbg(pdata->dev, "redrv addr=%#x\n", phy_data->redrv_addr);
3504 dev_dbg(pdata->dev, "redrv lane=%u\n", phy_data->redrv_lane);
3505 dev_dbg(pdata->dev, "redrv model=%u\n", phy_data->redrv_model);
3511 phy_data->port_mode, phy_data->conn_type);
3518 phy_data->port_mode, phy_data->port_speeds);
3528 if (xgbe_phy_redrv_error(phy_data)) {
3532 pdata->kr_redrv = phy_data->redrv;
3535 phy_data->cur_mode = XGBE_MODE_UNKNOWN;
3540 switch (phy_data->port_mode) {
3549 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) {
3551 phy_data->start_mode = XGBE_MODE_KX_1000;
3553 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) {
3557 phy_data->start_mode = XGBE_MODE_KR;
3560 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE;
3567 phy_data->start_mode = XGBE_MODE_KX_2500;
3569 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE;
3578 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) {
3580 phy_data->start_mode = XGBE_MODE_SGMII_10;
3582 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) {
3584 phy_data->start_mode = XGBE_MODE_SGMII_100;
3586 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) {
3588 phy_data->start_mode = XGBE_MODE_SGMII_1000;
3591 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22;
3601 phy_data->start_mode = XGBE_MODE_X;
3603 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22;
3612 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) {
3614 phy_data->start_mode = XGBE_MODE_SGMII_10;
3616 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) {
3618 phy_data->start_mode = XGBE_MODE_SGMII_100;
3620 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) {
3622 phy_data->start_mode = XGBE_MODE_SGMII_1000;
3624 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) {
3626 phy_data->start_mode = XGBE_MODE_KX_2500;
3629 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45;
3638 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) {
3640 phy_data->start_mode = XGBE_MODE_SGMII_10;
3642 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) {
3644 phy_data->start_mode = XGBE_MODE_SGMII_100;
3646 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) {
3648 phy_data->start_mode = XGBE_MODE_SGMII_1000;
3650 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) {
3652 phy_data->start_mode = XGBE_MODE_KX_2500;
3654 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) {
3656 phy_data->start_mode = XGBE_MODE_KR;
3659 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45;
3674 phy_data->start_mode = XGBE_MODE_SFI;
3676 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE;
3686 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10)
3687 phy_data->start_mode = XGBE_MODE_SGMII_10;
3688 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100)
3689 phy_data->start_mode = XGBE_MODE_SGMII_100;
3690 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
3691 phy_data->start_mode = XGBE_MODE_SGMII_1000;
3692 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)
3693 phy_data->start_mode = XGBE_MODE_SFI;
3695 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22;
3708 if ((phy_data->conn_type & XGBE_CONN_TYPE_MDIO) &&
3709 (phy_data->phydev_mode != XGBE_MDIO_MODE_NONE)) {
3710 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr,
3711 phy_data->phydev_mode);
3715 phy_data->mdio_addr, phy_data->phydev_mode);
3720 if (phy_data->redrv && !phy_data->redrv_if) {
3721 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr,
3726 phy_data->redrv_addr);
3731 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT;
3754 phy_data->mii = mii;