Lines Matching refs:pdata
125 static int xgbe_config_multi_msi(struct xgbe_prv_data *pdata)
132 vector_count += max(pdata->rx_ring_count,
133 pdata->tx_ring_count);
135 ret = pci_alloc_irq_vectors(pdata->pcidev, XGBE_MSI_MIN_COUNT,
138 dev_info(pdata->dev, "multi MSI/MSI-X enablement failed\n");
142 pdata->isr_as_tasklet = 1;
143 pdata->irq_count = ret;
145 pdata->dev_irq = pci_irq_vector(pdata->pcidev, 0);
146 pdata->ecc_irq = pci_irq_vector(pdata->pcidev, 1);
147 pdata->i2c_irq = pci_irq_vector(pdata->pcidev, 2);
148 pdata->an_irq = pci_irq_vector(pdata->pcidev, 3);
151 pdata->channel_irq[j] = pci_irq_vector(pdata->pcidev, i);
152 pdata->channel_irq_count = j;
154 pdata->per_channel_irq = 1;
155 pdata->channel_irq_mode = XGBE_IRQ_MODE_LEVEL;
157 if (netif_msg_probe(pdata))
158 dev_dbg(pdata->dev, "multi %s interrupts enabled\n",
159 pdata->pcidev->msix_enabled ? "MSI-X" : "MSI");
164 static int xgbe_config_irqs(struct xgbe_prv_data *pdata)
168 ret = xgbe_config_multi_msi(pdata);
172 ret = pci_alloc_irq_vectors(pdata->pcidev, 1, 1,
175 dev_info(pdata->dev, "single IRQ enablement failed\n");
179 pdata->isr_as_tasklet = pdata->pcidev->msi_enabled ? 1 : 0;
180 pdata->irq_count = 1;
181 pdata->channel_irq_count = 1;
183 pdata->dev_irq = pci_irq_vector(pdata->pcidev, 0);
184 pdata->ecc_irq = pci_irq_vector(pdata->pcidev, 0);
185 pdata->i2c_irq = pci_irq_vector(pdata->pcidev, 0);
186 pdata->an_irq = pci_irq_vector(pdata->pcidev, 0);
188 if (netif_msg_probe(pdata))
189 dev_dbg(pdata->dev, "single %s interrupt enabled\n",
190 pdata->pcidev->msi_enabled ? "MSI" : "legacy");
193 if (netif_msg_probe(pdata)) {
196 dev_dbg(pdata->dev, " dev irq=%d\n", pdata->dev_irq);
197 dev_dbg(pdata->dev, " ecc irq=%d\n", pdata->ecc_irq);
198 dev_dbg(pdata->dev, " i2c irq=%d\n", pdata->i2c_irq);
199 dev_dbg(pdata->dev, " an irq=%d\n", pdata->an_irq);
200 for (i = 0; i < pdata->channel_irq_count; i++)
201 dev_dbg(pdata->dev, " dma%u irq=%d\n",
202 i, pdata->channel_irq[i]);
210 struct xgbe_prv_data *pdata;
219 pdata = xgbe_alloc_pdata(dev);
220 if (IS_ERR(pdata)) {
221 ret = PTR_ERR(pdata);
225 pdata->pcidev = pdev;
226 pci_set_drvdata(pdev, pdata);
229 pdata->vdata = (struct xgbe_version_data *)id->driver_data;
252 pdata->xgmac_regs = iomap_table[XGBE_XGMAC_BAR];
253 if (!pdata->xgmac_regs) {
258 pdata->xprop_regs = pdata->xgmac_regs + XGBE_MAC_PROP_OFFSET;
259 pdata->xi2c_regs = pdata->xgmac_regs + XGBE_I2C_CTRL_OFFSET;
260 if (netif_msg_probe(pdata)) {
261 dev_dbg(dev, "xgmac_regs = %p\n", pdata->xgmac_regs);
262 dev_dbg(dev, "xprop_regs = %p\n", pdata->xprop_regs);
263 dev_dbg(dev, "xi2c_regs = %p\n", pdata->xi2c_regs);
266 pdata->xpcs_regs = iomap_table[XGBE_XPCS_BAR];
267 if (!pdata->xpcs_regs) {
272 if (netif_msg_probe(pdata))
273 dev_dbg(dev, "xpcs_regs = %p\n", pdata->xpcs_regs);
279 pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
280 pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
283 pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;
284 pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;
287 pdata->vdata->an_cdr_workaround = 0;
290 pdata->vdata->enable_rrc = 0;
292 pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
293 pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
298 reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
299 pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
300 pdata->xpcs_window <<= 6;
301 pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
302 pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
303 pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
304 if (netif_msg_probe(pdata)) {
306 pdata->xpcs_window_def_reg);
308 pdata->xpcs_window_sel_reg);
310 pdata->xpcs_window);
312 pdata->xpcs_window_size);
314 pdata->xpcs_window_mask);
320 XP_IOWRITE(pdata, XP_INT_EN, 0x1fffff);
323 ma_lo = XP_IOREAD(pdata, XP_MAC_ADDR_LO);
324 ma_hi = XP_IOREAD(pdata, XP_MAC_ADDR_HI);
325 pdata->mac_addr[0] = ma_lo & 0xff;
326 pdata->mac_addr[1] = (ma_lo >> 8) & 0xff;
327 pdata->mac_addr[2] = (ma_lo >> 16) & 0xff;
328 pdata->mac_addr[3] = (ma_lo >> 24) & 0xff;
329 pdata->mac_addr[4] = ma_hi & 0xff;
330 pdata->mac_addr[5] = (ma_hi >> 8) & 0xff;
332 !is_valid_ether_addr(pdata->mac_addr)) {
339 pdata->sysclk_rate = XGBE_V2_DMA_CLOCK_FREQ;
340 pdata->ptpclk_rate = XGBE_V2_PTP_CLOCK_FREQ;
343 pdata->coherent = 1;
344 pdata->arcr = XGBE_DMA_PCI_ARCR;
345 pdata->awcr = XGBE_DMA_PCI_AWCR;
346 pdata->awarcr = XGBE_DMA_PCI_AWARCR;
349 pdata->pp0 = XP_IOREAD(pdata, XP_PROP_0);
350 pdata->pp1 = XP_IOREAD(pdata, XP_PROP_1);
351 pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2);
352 pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3);
353 pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4);
354 if (netif_msg_probe(pdata)) {
355 dev_dbg(dev, "port property 0 = %#010x\n", pdata->pp0);
356 dev_dbg(dev, "port property 1 = %#010x\n", pdata->pp1);
357 dev_dbg(dev, "port property 2 = %#010x\n", pdata->pp2);
358 dev_dbg(dev, "port property 3 = %#010x\n", pdata->pp3);
359 dev_dbg(dev, "port property 4 = %#010x\n", pdata->pp4);
363 pdata->tx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1,
365 pdata->rx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1,
367 pdata->tx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1,
369 pdata->rx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1,
371 if (netif_msg_probe(pdata)) {
373 pdata->tx_max_channel_count,
374 pdata->rx_max_channel_count);
376 pdata->tx_max_q_count, pdata->rx_max_q_count);
380 xgbe_set_counts(pdata);
383 pdata->tx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2,
385 pdata->tx_max_fifo_size *= 16384;
386 pdata->tx_max_fifo_size = min(pdata->tx_max_fifo_size,
387 pdata->vdata->tx_max_fifo_size);
388 pdata->rx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2,
390 pdata->rx_max_fifo_size *= 16384;
391 pdata->rx_max_fifo_size = min(pdata->rx_max_fifo_size,
392 pdata->vdata->rx_max_fifo_size);
393 if (netif_msg_probe(pdata))
395 pdata->tx_max_fifo_size, pdata->rx_max_fifo_size);
398 ret = xgbe_config_irqs(pdata);
403 ret = xgbe_config_netdev(pdata);
407 netdev_notice(pdata->netdev, "net device enabled\n");
412 pci_free_irq_vectors(pdata->pcidev);
415 xgbe_free_pdata(pdata);
425 struct xgbe_prv_data *pdata = pci_get_drvdata(pdev);
427 xgbe_deconfig_netdev(pdata);
429 pci_free_irq_vectors(pdata->pcidev);
432 XP_IOWRITE(pdata, XP_INT_EN, 0x0);
434 xgbe_free_pdata(pdata);
439 struct xgbe_prv_data *pdata = dev_get_drvdata(dev);
440 struct net_device *netdev = pdata->netdev;
446 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);
447 pdata->lpm_ctrl |= MDIO_CTRL1_LPOWER;
448 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl);
455 struct xgbe_prv_data *pdata = dev_get_drvdata(dev);
456 struct net_device *netdev = pdata->netdev;
459 XP_IOWRITE(pdata, XP_INT_EN, 0x1fffff);
461 pdata->lpm_ctrl &= ~MDIO_CTRL1_LPOWER;
462 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl);
470 schedule_work(&pdata->restart_work);