ethernet/amd/pcnet32.c

243 	void	(*write_csr) (unsigned long, int, u16);
383 	.write_csr = pcnet32_wio_write_csr,
438 	.write_csr = pcnet32_dwio_write_csr,
464 	lp->a->write_csr(ioaddr, CSR3, val);
690 	a->write_csr(ioaddr, CSR5, csr5 | CSR5_SUSPEND);
715 	lp->a->write_csr(ioaddr, CSR5, csr5 & ~CSR5_SUSPEND);
763 			lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
776 			lp->a->write_csr(ioaddr, CSR15, csr15);
893 	lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);	/* stop the chip */
989 	lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);	/* stop the chip */
995 	lp->a->write_csr(ioaddr, CSR4, 0x0915);	/* auto tx pad */
1003 	lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);	/* Set STOP bit */
1054 	lp->a->write_csr(ioaddr, CSR15, x | 0x0044);
1057 	lp->a->write_csr(ioaddr, CSR0, CSR0_START);	/* Set STRT bit */
1076 	lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);	/* Set STOP bit */
1112 	a->write_csr(ioaddr, CSR15, (x & ~0x0044));	/* reset bits 6 and 2 */
1402 		lp->a->write_csr(ioaddr, CSR4, 0x0915);	/* auto tx pad */
1411 		lp->a->write_csr(ioaddr, CSR3, val);
1414 		lp->a->write_csr(ioaddr, CSR0, CSR0_INTEN);
1715 		a->write_csr(ioaddr, 80,
1916 	a->write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff));
1917 	a->write_csr(ioaddr, 2, (lp->init_dma_addr >> 16));
1932 		a->write_csr(ioaddr, CSR0, CSR0_INTEN | CSR0_INIT);
2152 	lp->a->write_csr(ioaddr, 124, val);
2256 		lp->a->write_csr(ioaddr, CSR3, val);
2272 	lp->a->write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff));
2273 	lp->a->write_csr(ioaddr, 2, (lp->init_dma_addr >> 16));
2275 	lp->a->write_csr(ioaddr, CSR4, 0x0915);	/* auto tx pad */
2276 	lp->a->write_csr(ioaddr, CSR0, CSR0_INIT);
2294 	lp->a->write_csr(ioaddr, CSR0, CSR0_NORMAL);
2441 	lp->a->write_csr(ioaddr, CSR0, CSR0_INIT);
2447 	lp->a->write_csr(ioaddr, CSR0, csr0_bits);
2460 	lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
2539 	lp->a->write_csr(ioaddr, CSR0, CSR0_INTEN | CSR0_TXPOLL);
2570 		lp->a->write_csr(ioaddr, CSR0, csr0 & ~0x004f);
2603 			lp->a->write_csr(ioaddr, CSR3, val);
2640 	lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
2690 		lp->a->write_csr(ioaddr, PCNET32_MC_FILTER, 0xffff);
2691 		lp->a->write_csr(ioaddr, PCNET32_MC_FILTER+1, 0xffff);
2692 		lp->a->write_csr(ioaddr, PCNET32_MC_FILTER+2, 0xffff);
2693 		lp->a->write_csr(ioaddr, PCNET32_MC_FILTER+3, 0xffff);
2707 		lp->a->write_csr(ioaddr, PCNET32_MC_FILTER + i,
2729 		lp->a->write_csr(ioaddr, CSR15, csr15 | 0x8000);
2733 		lp->a->write_csr(ioaddr, CSR15, csr15 & 0x7fff);
2740 		lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);