ethernet/allwinner/sun4i-emac.c

77 	void __iomem		*membase;
108 	reg_val = readl(db->membase + EMAC_MAC_SUPP_REG);
112 	writel(reg_val, db->membase + EMAC_MAC_SUPP_REG);
121 	reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
125 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
203 	writel(0, db->membase + EMAC_CTL_REG);
205 	writel(EMAC_CTL_RESET, db->membase + EMAC_CTL_REG);
261 	reg_val = readl(db->membase + EMAC_RX_CTL_REG);
263 	writel(reg_val, db->membase + EMAC_RX_CTL_REG);
266 	reg_val = readl(db->membase + EMAC_INT_CTL_REG);
268 	writel(reg_val, db->membase + EMAC_INT_CTL_REG);
367 	reg_val = readl(db->membase + EMAC_TX_MODE_REG);
370 		db->membase + EMAC_TX_MODE_REG);
374 	reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
377 		db->membase + EMAC_MAC_CTL0_REG);
380 	reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
384 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
387 	writel(EMAC_MAC_IPGT_FULL_DUPLEX, db->membase + EMAC_MAC_IPGT_REG);
391 		db->membase + EMAC_MAC_IPGR_REG);
395 		db->membase + EMAC_MAC_CLRT_REG);
399 		db->membase + EMAC_MAC_MAXF_REG);
410 	reg_val = readl(db->membase + EMAC_RX_CTL_REG);
421 		db->membase + EMAC_RX_CTL_REG);
431 	reg_val = readl(db->membase + EMAC_RX_CTL_REG);
433 	writel(reg_val, db->membase + EMAC_RX_CTL_REG);
438 	reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
440 	writel(reg_val, db->membase + EMAC_MAC_CTL0_REG);
443 	reg_val = readl(db->membase + EMAC_MAC_MCFG_REG);
446 	writel(reg_val, db->membase + EMAC_MAC_MCFG_REG);
449 	writel(0x0, db->membase + EMAC_RX_FBC_REG);
452 	writel(0, db->membase + EMAC_INT_CTL_REG);
453 	reg_val = readl(db->membase + EMAC_INT_STA_REG);
454 	writel(reg_val, db->membase + EMAC_INT_STA_REG);
463 	       dev_addr[2], db->membase + EMAC_MAC_A1_REG);
465 	       dev_addr[5], db->membase + EMAC_MAC_A0_REG);
483 	       dev_addr[2], db->membase + EMAC_MAC_A1_REG);
485 	       dev_addr[5], db->membase + EMAC_MAC_A0_REG);
503 	reg_val = readl(db->membase + EMAC_CTL_REG);
505 		db->membase + EMAC_CTL_REG);
508 	reg_val = readl(db->membase + EMAC_INT_CTL_REG);
510 	writel(reg_val, db->membase + EMAC_INT_CTL_REG);
555 	writel(channel, db->membase + EMAC_TX_INS_REG);
557 	emac_outblk_32bit(db->membase + EMAC_TX_IO_DATA_REG,
565 		writel(skb->len, db->membase + EMAC_TX_PL0_REG);
567 		writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1,
568 		       db->membase + EMAC_TX_CTL0_REG);
574 		writel(skb->len, db->membase + EMAC_TX_PL1_REG);
576 		writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1,
577 		       db->membase + EMAC_TX_CTL1_REG);
632 		rxcount = readl(db->membase + EMAC_RX_FBC_REG);
639 			reg_val = readl(db->membase + EMAC_INT_CTL_REG);
643 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);
646 			rxcount = readl(db->membase + EMAC_RX_FBC_REG);
651 		reg_val = readl(db->membase + EMAC_RX_IO_DATA_REG);
656 			reg_val = readl(db->membase + EMAC_CTL_REG);
658 			       db->membase + EMAC_CTL_REG);
661 			reg_val = readl(db->membase + EMAC_RX_CTL_REG);
663 			       db->membase + EMAC_RX_CTL_REG);
666 				reg_val = readl(db->membase + EMAC_RX_CTL_REG);
670 			reg_val = readl(db->membase + EMAC_CTL_REG);
672 			       db->membase + EMAC_CTL_REG);
673 			reg_val = readl(db->membase + EMAC_INT_CTL_REG);
677 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);
687 		rxhdr = readl(db->membase + EMAC_RX_IO_DATA_REG);
735 				reg_val = readl(db->membase + EMAC_RX_CTL_REG);
737 				writel(reg_val, db->membase + EMAC_RX_CTL_REG);
742 				reg_val = readl(db->membase + EMAC_RX_CTL_REG);
744 				writel(reg_val, db->membase + EMAC_RX_CTL_REG);
747 			emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG,
771 	writel(0, db->membase + EMAC_INT_CTL_REG);
775 	int_status = readl(db->membase + EMAC_INT_STA_REG);
777 	writel(int_status, db->membase + EMAC_INT_STA_REG);
798 		reg_val = readl(db->membase + EMAC_INT_CTL_REG);
800 		writel(reg_val, db->membase + EMAC_INT_CTL_REG);
802 		reg_val = readl(db->membase + EMAC_INT_CTL_REG);
804 		writel(reg_val, db->membase + EMAC_INT_CTL_REG);
861 	writel(0, db->membase + EMAC_INT_CTL_REG);
864 	reg_val = readl(db->membase + EMAC_INT_STA_REG);
865 	writel(reg_val, db->membase + EMAC_INT_STA_REG);
868 	reg_val = readl(db->membase + EMAC_CTL_REG);
870 	writel(reg_val, db->membase + EMAC_CTL_REG);
989 	db->membase = of_iomap(np, 0);
990 	if (!db->membase) {
997 	ndev->base_addr = (unsigned long)db->membase;
1065 		 ndev->name, db->membase, ndev->irq, ndev->dev_addr);
1077 	iounmap(db->membase);
1100 	iounmap(db->membase);