ethernet/allwinner/sun4i-emac.c

105 	unsigned int reg_val;
108 	reg_val = readl(db->membase + EMAC_MAC_SUPP_REG);
109 	reg_val &= ~EMAC_MAC_SUPP_100M;
111 		reg_val |= EMAC_MAC_SUPP_100M;
112 	writel(reg_val, db->membase + EMAC_MAC_SUPP_REG);
118 	unsigned int reg_val;
121 	reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
122 	reg_val &= ~EMAC_MAC_CTL1_DUPLEX_EN;
124 		reg_val |= EMAC_MAC_CTL1_DUPLEX_EN;
125 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
250 	u32 reg_val;
261 	reg_val = readl(db->membase + EMAC_RX_CTL_REG);
262 	reg_val &= ~EMAC_RX_CTL_DMA_EN;
263 	writel(reg_val, db->membase + EMAC_RX_CTL_REG);
266 	reg_val = readl(db->membase + EMAC_INT_CTL_REG);
267 	reg_val |= EMAC_INT_CTL_RX_EN;
268 	writel(reg_val, db->membase + EMAC_INT_CTL_REG);
364 	unsigned int reg_val;
367 	reg_val = readl(db->membase + EMAC_TX_MODE_REG);
369 	writel(reg_val | EMAC_TX_MODE_ABORTED_FRAME_EN,
374 	reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
375 	writel(reg_val | EMAC_MAC_CTL0_RX_FLOW_CTL_EN |
380 	reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
381 	reg_val |= EMAC_MAC_CTL1_LEN_CHECK_EN;
382 	reg_val |= EMAC_MAC_CTL1_CRC_EN;
383 	reg_val |= EMAC_MAC_CTL1_PAD_EN;
384 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
407 	unsigned int reg_val;
410 	reg_val = readl(db->membase + EMAC_RX_CTL_REG);
413 		reg_val |= EMAC_RX_CTL_PASS_ALL_EN;
415 		reg_val &= ~EMAC_RX_CTL_PASS_ALL_EN;
417 	writel(reg_val | EMAC_RX_CTL_PASS_LEN_OOR_EN |
427 	unsigned int reg_val;
431 	reg_val = readl(db->membase + EMAC_RX_CTL_REG);
432 	reg_val |= EMAC_RX_CTL_FLUSH_FIFO;
433 	writel(reg_val, db->membase + EMAC_RX_CTL_REG);
438 	reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
439 	reg_val &= ~EMAC_MAC_CTL0_SOFT_RESET;
440 	writel(reg_val, db->membase + EMAC_MAC_CTL0_REG);
443 	reg_val = readl(db->membase + EMAC_MAC_MCFG_REG);
444 	reg_val &= ~EMAC_MAC_MCFG_MII_CLKD_MASK;
445 	reg_val |= EMAC_MAC_MCFG_MII_CLKD_72;
446 	writel(reg_val, db->membase + EMAC_MAC_MCFG_REG);
453 	reg_val = readl(db->membase + EMAC_INT_STA_REG);
454 	writel(reg_val, db->membase + EMAC_INT_STA_REG);
495 	unsigned int reg_val;
503 	reg_val = readl(db->membase + EMAC_CTL_REG);
504 	writel(reg_val | EMAC_CTL_RESET | EMAC_CTL_TX_EN | EMAC_CTL_RX_EN,
508 	reg_val = readl(db->membase + EMAC_INT_CTL_REG);
509 	reg_val |= (EMAC_INT_CTL_TX_EN | EMAC_INT_CTL_TX_ABRT_EN | EMAC_INT_CTL_RX_EN);
510 	writel(reg_val, db->membase + EMAC_INT_CTL_REG);
623 	unsigned int reg_val;
639 			reg_val = readl(db->membase + EMAC_INT_CTL_REG);
640 			reg_val |= (EMAC_INT_CTL_TX_EN |
643 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);
651 		reg_val = readl(db->membase + EMAC_RX_IO_DATA_REG);
653 			dev_dbg(db->dev, "receive header: %x\n", reg_val);
654 		if (reg_val != EMAC_UNDOCUMENTED_MAGIC) {
656 			reg_val = readl(db->membase + EMAC_CTL_REG);
657 			writel(reg_val & ~EMAC_CTL_RX_EN,
661 			reg_val = readl(db->membase + EMAC_RX_CTL_REG);
662 			writel(reg_val | (1 << 3),
666 				reg_val = readl(db->membase + EMAC_RX_CTL_REG);
667 			} while (reg_val & (1 << 3));
670 			reg_val = readl(db->membase + EMAC_CTL_REG);
671 			writel(reg_val | EMAC_CTL_RX_EN,
673 			reg_val = readl(db->membase + EMAC_INT_CTL_REG);
674 			reg_val |= (EMAC_INT_CTL_TX_EN |
677 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);
735 				reg_val = readl(db->membase + EMAC_RX_CTL_REG);
736 				reg_val |= EMAC_RX_CTL_DMA_EN;
737 				writel(reg_val, db->membase + EMAC_RX_CTL_REG);
742 				reg_val = readl(db->membase + EMAC_RX_CTL_REG);
743 				reg_val &= ~EMAC_RX_CTL_DMA_EN;
744 				writel(reg_val, db->membase + EMAC_RX_CTL_REG);
764 	unsigned int reg_val;
798 		reg_val = readl(db->membase + EMAC_INT_CTL_REG);
799 		reg_val |= (EMAC_INT_CTL_TX_EN | EMAC_INT_CTL_TX_ABRT_EN | EMAC_INT_CTL_RX_EN);
800 		writel(reg_val, db->membase + EMAC_INT_CTL_REG);
802 		reg_val = readl(db->membase + EMAC_INT_CTL_REG);
803 		reg_val |= (EMAC_INT_CTL_TX_EN | EMAC_INT_CTL_TX_ABRT_EN);
804 		writel(reg_val, db->membase + EMAC_INT_CTL_REG);
857 	unsigned int reg_val;
864 	reg_val = readl(db->membase + EMAC_INT_STA_REG);
865 	writel(reg_val, db->membase + EMAC_INT_STA_REG);
868 	reg_val = readl(db->membase + EMAC_CTL_REG);
869 	reg_val &= ~(EMAC_CTL_TX_EN | EMAC_CTL_RX_EN | EMAC_CTL_RESET);
870 	writel(reg_val, db->membase + EMAC_CTL_REG);