Lines Matching refs:ps

37 	struct dsa_loop_priv *ps = priv;
41 for (i = 0; i < ARRAY_SIZE(ps->vlans); i++) {
42 vl = &ps->vlans[i];
53 struct dsa_loop_priv *ps = ds->priv;
56 devlink_resource_size_params_init(&size_params, ARRAY_SIZE(ps->vlans),
57 ARRAY_SIZE(ps->vlans),
60 err = dsa_devlink_resource_register(ds, "VTU", ARRAY_SIZE(ps->vlans),
69 dsa_loop_devlink_vtu_get, ps);
89 struct dsa_loop_priv *ps = ds->priv;
93 memcpy(ps->ports[i].mib, dsa_loop_mibs,
117 struct dsa_loop_priv *ps = ds->priv;
125 ps->ports[port].mib[i].name, ETH_GSTRING_LEN);
131 struct dsa_loop_priv *ps = ds->priv;
135 data[i] = ps->ports[port].mib[i].val;
140 struct dsa_loop_priv *ps = ds->priv;
141 struct mii_bus *bus = ps->bus;
144 ret = mdiobus_read_nested(bus, ps->port_base + port, regnum);
146 ps->ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++;
148 ps->ports[port].mib[DSA_LOOP_PHY_READ_OK].val++;
156 struct dsa_loop_priv *ps = ds->priv;
157 struct mii_bus *bus = ps->bus;
160 ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value);
162 ps->ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++;
164 ps->ports[port].mib[DSA_LOOP_PHY_WRITE_OK].val++;
210 struct dsa_loop_priv *ps = ds->priv;
211 struct mii_bus *bus = ps->bus;
214 if (vlan->vid >= ARRAY_SIZE(ps->vlans))
218 mdiobus_read(bus, ps->port_base + port, MII_BMSR);
220 vl = &ps->vlans[vlan->vid];
232 ps->ports[port].pvid = vlan->vid;
241 struct dsa_loop_priv *ps = ds->priv;
242 u16 pvid = ps->ports[port].pvid;
243 struct mii_bus *bus = ps->bus;
247 mdiobus_read(bus, ps->port_base + port, MII_BMSR);
249 vl = &ps->vlans[vlan->vid];
260 ps->ports[port].pvid = pvid;
312 struct dsa_loop_priv *ps;
326 ps = devm_kzalloc(&mdiodev->dev, sizeof(*ps), GFP_KERNEL);
327 if (!ps)
330 ps->netdev = dev_get_by_name(&init_net, pdata->netdev);
331 if (!ps->netdev)
334 pdata->cd.netdev[DSA_LOOP_CPU_PORT] = &ps->netdev->dev;
338 ds->priv = ps;
339 ps->bus = mdiodev->bus;
354 struct dsa_loop_priv *ps;
359 ps = ds->priv;
362 dev_put(ps->netdev);