net/can/xilinx_can.c

220  * @read_reg:			For reading data from CAN registers
246 	u32 (*read_reg)(const struct xcan_priv *priv, enum xcan_reg reg);
458 	while (!(priv->read_reg(priv, XCAN_SR_OFFSET) & XCAN_SR_CONFIG_MASK)) {
491 	is_config_mode = priv->read_reg(priv, XCAN_SR_OFFSET) &
541 		   priv->read_reg(priv, XCAN_BRPR_OFFSET),
542 		   priv->read_reg(priv, XCAN_BTR_OFFSET));
609 		   priv->read_reg(priv, XCAN_SR_OFFSET));
748 	if (unlikely(priv->read_reg(priv, XCAN_SR_OFFSET) &
781 	if (unlikely(priv->read_reg(priv, XCAN_TRR_OFFSET) &
857 	id_xcan = priv->read_reg(priv, XCAN_FRAME_ID_OFFSET(frame_base));
858 	dlc = priv->read_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_base)) >>
882 	data[0] = priv->read_reg(priv, XCAN_FRAME_DW1_OFFSET(frame_base));
883 	data[1] = priv->read_reg(priv, XCAN_FRAME_DW2_OFFSET(frame_base));
920 	id_xcan = priv->read_reg(priv, XCAN_FRAME_ID_OFFSET(frame_base));
921 	dlc = priv->read_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_base));
965 			data[0] = priv->read_reg(priv, dw_offset);
972 			data[0] = priv->read_reg(priv, dw_offset + i);
1000 	u32 status = priv->read_reg(priv, XCAN_SR_OFFSET);
1024 	u32 ecr = priv->read_reg(priv, XCAN_ECR_OFFSET);
1095 	err_status = priv->read_reg(priv, XCAN_ESR_OFFSET);
1195 		reg_rx_ecc = priv->read_reg(priv, XCAN_RXFIFO_ECC_OFFSET);
1196 		reg_txol_ecc = priv->read_reg(priv, XCAN_TXOLFIFO_ECC_OFFSET);
1197 		reg_txtl_ecc = priv->read_reg(priv, XCAN_TXTLFIFO_ECC_OFFSET);
1252 		   __func__, priv->read_reg(priv, XCAN_ESR_OFFSET));
1294 		fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);
1314 		if (!(priv->read_reg(priv, XCAN_ISR_OFFSET) &
1367 			ier = priv->read_reg(priv, XCAN_IER_OFFSET);
1426 			isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
1472 	isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
1503 		ier = priv->read_reg(priv, XCAN_IER_OFFSET);
1639 	bec->txerr = priv->read_reg(priv, XCAN_ECR_OFFSET) & XCAN_ECR_TEC_MASK;
1640 	bec->rxerr = ((priv->read_reg(priv, XCAN_ECR_OFFSET) &
1659 	*tdcv = FIELD_GET(XCAN_SR_TDCV_MASK, priv->read_reg(priv, XCAN_SR_OFFSET));
2031 	priv->read_reg = xcan_read_reg_le;
2041 	if (priv->read_reg(priv, XCAN_SR_OFFSET) != XCAN_SR_CONFIG_MASK) {
2043 		priv->read_reg = xcan_read_reg_be;