Lines Matching refs:priv
95 mcp251xfd_get_model_str(const struct mcp251xfd_priv *priv)
97 return __mcp251xfd_get_model_str(priv->devtype_data.model);
140 static inline int mcp251xfd_vdd_enable(const struct mcp251xfd_priv *priv)
142 if (!priv->reg_vdd)
145 return regulator_enable(priv->reg_vdd);
148 static inline int mcp251xfd_vdd_disable(const struct mcp251xfd_priv *priv)
150 if (!priv->reg_vdd)
153 return regulator_disable(priv->reg_vdd);
157 mcp251xfd_transceiver_enable(const struct mcp251xfd_priv *priv)
159 if (!priv->reg_xceiver)
162 return regulator_enable(priv->reg_xceiver);
166 mcp251xfd_transceiver_disable(const struct mcp251xfd_priv *priv)
168 if (!priv->reg_xceiver)
171 return regulator_disable(priv->reg_xceiver);
174 static int mcp251xfd_clks_and_vdd_enable(const struct mcp251xfd_priv *priv)
178 err = clk_prepare_enable(priv->clk);
182 err = mcp251xfd_vdd_enable(priv);
184 clk_disable_unprepare(priv->clk);
193 static int mcp251xfd_clks_and_vdd_disable(const struct mcp251xfd_priv *priv)
197 err = mcp251xfd_vdd_disable(priv);
201 clk_disable_unprepare(priv->clk);
212 mcp251xfd_chip_get_mode(const struct mcp251xfd_priv *priv, u8 *mode)
217 err = regmap_read(priv->map_reg, MCP251XFD_REG_CON, &val);
227 __mcp251xfd_chip_set_mode(const struct mcp251xfd_priv *priv,
230 const struct can_bittiming *bt = &priv->can.bittiming;
237 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_CON,
240 netdev_err(priv->ndev,
256 err = regmap_read_poll_timeout(priv->map_reg, MCP251XFD_REG_CON, con,
267 regmap_read(priv->map_reg, MCP251XFD_REG_OSC, &osc);
270 netdev_err(priv->ndev,
278 netdev_err(priv->ndev,
288 mcp251xfd_chip_set_mode(const struct mcp251xfd_priv *priv,
291 return __mcp251xfd_chip_set_mode(priv, mode_req, false);
295 mcp251xfd_chip_set_mode_nowait(const struct mcp251xfd_priv *priv,
298 return __mcp251xfd_chip_set_mode(priv, mode_req, true);
302 mcp251xfd_chip_wait_for_osc_ready(const struct mcp251xfd_priv *priv,
308 err = regmap_read_poll_timeout(priv->map_reg, MCP251XFD_REG_OSC, osc,
317 netdev_err(priv->ndev,
323 netdev_err(priv->ndev,
331 static int mcp251xfd_chip_wake(const struct mcp251xfd_priv *priv)
356 err = regmap_write(priv->map_reg, MCP251XFD_REG_OSC, osc);
364 return mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);
367 static inline int mcp251xfd_chip_sleep(const struct mcp251xfd_priv *priv)
369 if (priv->pll_enable) {
376 err = regmap_write(priv->map_reg, MCP251XFD_REG_OSC, osc);
378 netdev_err(priv->ndev,
381 priv->spi->max_speed_hz = priv->spi_max_speed_hz_slow;
384 return mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_SLEEP);
387 static int mcp251xfd_chip_softreset_do(const struct mcp251xfd_priv *priv)
395 err = mcp251xfd_chip_wake(priv);
399 err = mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);
404 return spi_write_then_read(priv->spi, &cmd, sizeof(cmd), NULL, 0);
407 static int mcp251xfd_chip_softreset_check(const struct mcp251xfd_priv *priv)
420 err = mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);
424 err = mcp251xfd_chip_get_mode(priv, &mode);
429 netdev_info(priv->ndev,
438 static int mcp251xfd_chip_softreset(const struct mcp251xfd_priv *priv)
444 netdev_info(priv->ndev,
447 err = mcp251xfd_chip_softreset_do(priv);
453 err = mcp251xfd_chip_softreset_check(priv);
465 static int mcp251xfd_chip_clock_init(const struct mcp251xfd_priv *priv)
480 if (priv->pll_enable) {
485 err = regmap_write(priv->map_reg, MCP251XFD_REG_OSC, osc);
489 err = mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);
493 priv->spi->max_speed_hz = priv->spi_max_speed_hz_fast;
498 static int mcp251xfd_chip_timestamp_init(const struct mcp251xfd_priv *priv)
505 return regmap_write(priv->map_reg, MCP251XFD_REG_TSCON,
509 static int mcp251xfd_set_bittiming(const struct mcp251xfd_priv *priv)
511 const struct can_bittiming *bt = &priv->can.bittiming;
512 const struct can_bittiming *dbt = &priv->can.data_bittiming;
543 if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD_NON_ISO))
546 err = regmap_write(priv->map_reg, MCP251XFD_REG_CON, val);
558 err = regmap_write(priv->map_reg, MCP251XFD_REG_NBTCFG, val);
562 if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD))
573 err = regmap_write(priv->map_reg, MCP251XFD_REG_DBTCFG, val);
584 return regmap_write(priv->map_reg, MCP251XFD_REG_TDC, val);
587 static int mcp251xfd_chip_rx_int_enable(const struct mcp251xfd_priv *priv)
591 if (!priv->rx_int)
605 return regmap_write(priv->map_reg, MCP251XFD_REG_IOCON, val);
608 static int mcp251xfd_chip_rx_int_disable(const struct mcp251xfd_priv *priv)
612 if (!priv->rx_int)
621 return regmap_write(priv->map_reg, MCP251XFD_REG_IOCON, val);
624 static int mcp251xfd_chip_ecc_init(struct mcp251xfd_priv *priv)
626 struct mcp251xfd_ecc *ecc = &priv->ecc;
633 if (priv->devtype_data.quirks & MCP251XFD_QUIRK_ECC)
636 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_ECCCON,
645 err = regmap_raw_write(priv->map_reg, MCP251XFD_RAM_START, ram,
652 static u8 mcp251xfd_get_normal_mode(const struct mcp251xfd_priv *priv)
656 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)
658 else if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
660 else if (priv->can.ctrlmode & CAN_CTRLMODE_FD)
669 __mcp251xfd_chip_set_normal_mode(const struct mcp251xfd_priv *priv,
674 mode = mcp251xfd_get_normal_mode(priv);
676 return __mcp251xfd_chip_set_mode(priv, mode, nowait);
680 mcp251xfd_chip_set_normal_mode(const struct mcp251xfd_priv *priv)
682 return __mcp251xfd_chip_set_normal_mode(priv, false);
686 mcp251xfd_chip_set_normal_mode_nowait(const struct mcp251xfd_priv *priv)
688 return __mcp251xfd_chip_set_normal_mode(priv, true);
691 static int mcp251xfd_chip_interrupts_enable(const struct mcp251xfd_priv *priv)
697 err = regmap_write(priv->map_reg, MCP251XFD_REG_CRC, val);
702 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_ECCCON, val, val);
716 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
719 return regmap_write(priv->map_reg, MCP251XFD_REG_INT, val);
722 static int mcp251xfd_chip_interrupts_disable(const struct mcp251xfd_priv *priv)
727 err = regmap_write(priv->map_reg, MCP251XFD_REG_INT, 0);
732 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_ECCCON,
737 return regmap_write(priv->map_reg, MCP251XFD_REG_CRC, 0);
740 static void mcp251xfd_chip_stop(struct mcp251xfd_priv *priv,
743 priv->can.state = state;
745 mcp251xfd_chip_interrupts_disable(priv);
746 mcp251xfd_chip_rx_int_disable(priv);
747 mcp251xfd_chip_sleep(priv);
750 static int mcp251xfd_chip_start(struct mcp251xfd_priv *priv)
754 err = mcp251xfd_chip_softreset(priv);
758 err = mcp251xfd_chip_clock_init(priv);
762 err = mcp251xfd_chip_timestamp_init(priv);
766 err = mcp251xfd_set_bittiming(priv);
770 err = mcp251xfd_chip_rx_int_enable(priv);
774 err = mcp251xfd_chip_ecc_init(priv);
778 err = mcp251xfd_ring_init(priv);
782 err = mcp251xfd_chip_fifo_init(priv);
786 priv->can.state = CAN_STATE_ERROR_ACTIVE;
788 err = mcp251xfd_chip_set_normal_mode(priv);
795 mcp251xfd_dump(priv);
796 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
803 struct mcp251xfd_priv *priv = netdev_priv(ndev);
808 err = mcp251xfd_chip_start(priv);
812 err = mcp251xfd_chip_interrupts_enable(priv);
814 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
831 const struct mcp251xfd_priv *priv = netdev_priv(ndev);
835 err = regmap_read(priv->map_reg, MCP251XFD_REG_TREC, &trec);
851 const struct mcp251xfd_priv *priv = netdev_priv(ndev);
860 if (priv->can.state == CAN_STATE_BUS_OFF) {
861 *bec = priv->bec;
869 mcp251xfd_alloc_can_err_skb(struct mcp251xfd_priv *priv,
875 err = mcp251xfd_get_timestamp(priv, timestamp);
879 skb = alloc_can_err_skb(priv->ndev, cf);
881 mcp251xfd_skb_set_timestamp(priv, skb, *timestamp);
886 static int mcp251xfd_handle_rxovif(struct mcp251xfd_priv *priv)
888 struct net_device_stats *stats = &priv->ndev->stats;
898 err = regmap_read(priv->map_reg, MCP251XFD_REG_RXOVIF, &rxovif);
902 mcp251xfd_for_each_rx_ring(priv, ring, i) {
907 if (priv->regs_status.intf & MCP251XFD_REG_INT_SERRIF) {
909 netdev_dbg(priv->ndev,
914 netdev_dbg(priv->ndev,
919 err = regmap_update_bits(priv->map_reg,
927 skb = mcp251xfd_alloc_can_err_skb(priv, &cf, ×tamp);
934 err = can_rx_offload_queue_timestamp(&priv->offload, skb, timestamp);
941 static int mcp251xfd_handle_txatif(struct mcp251xfd_priv *priv)
943 netdev_info(priv->ndev, "%s\n", __func__);
948 static int mcp251xfd_handle_ivmif(struct mcp251xfd_priv *priv)
950 struct net_device_stats *stats = &priv->ndev->stats;
956 err = mcp251xfd_get_timestamp(priv, ×tamp);
960 err = regmap_read(priv->map_reg, MCP251XFD_REG_BDIAG1, &bdiag1);
967 err = regmap_write(priv->map_reg, MCP251XFD_REG_BDIAG1, 0x0);
971 priv->can.can_stats.bus_error++;
973 skb = alloc_can_err_skb(priv->ndev, &cf);
979 netdev_err(priv->ndev,
985 netdev_dbg(priv->ndev, "CRC error\n");
993 netdev_dbg(priv->ndev, "Stuff error\n");
1001 netdev_dbg(priv->ndev, "Format error\n");
1010 netdev_dbg(priv->ndev, "NACK error\n");
1020 netdev_dbg(priv->ndev, "Bit1 error\n");
1028 netdev_dbg(priv->ndev, "Bit0 error\n");
1038 mcp251xfd_skb_set_timestamp(priv, skb, timestamp);
1039 err = can_rx_offload_queue_timestamp(&priv->offload, skb, timestamp);
1046 static int mcp251xfd_handle_cerrif(struct mcp251xfd_priv *priv)
1048 struct net_device_stats *stats = &priv->ndev->stats;
1055 err = regmap_read(priv->map_reg, MCP251XFD_REG_TREC, &trec);
1076 if (new_state == priv->can.state)
1082 skb = mcp251xfd_alloc_can_err_skb(priv, &cf, ×tamp);
1083 can_change_state(priv->ndev, cf, tx_state, rx_state);
1091 err = __mcp251xfd_get_berr_counter(priv->ndev, &priv->bec);
1095 mcp251xfd_chip_stop(priv, CAN_STATE_BUS_OFF);
1096 can_bus_off(priv->ndev);
1105 err = mcp251xfd_get_berr_counter(priv->ndev, &bec);
1113 err = can_rx_offload_queue_timestamp(&priv->offload, skb, timestamp);
1121 mcp251xfd_handle_modif(const struct mcp251xfd_priv *priv, bool *set_normal_mode)
1123 const u8 mode_reference = mcp251xfd_get_normal_mode(priv);
1127 err = mcp251xfd_chip_get_mode(priv, &mode);
1132 netdev_dbg(priv->ndev,
1148 if ((priv->devtype_data.quirks & MCP251XFD_QUIRK_MAB_NO_WARN) &&
1151 netdev_dbg(priv->ndev,
1155 netdev_err(priv->ndev,
1167 if (priv->regs_status.intf & MCP251XFD_REG_INT_ECCIF) {
1172 return mcp251xfd_chip_set_normal_mode_nowait(priv);
1175 static int mcp251xfd_handle_serrif(struct mcp251xfd_priv *priv)
1177 struct mcp251xfd_ecc *ecc = &priv->ecc;
1178 struct net_device_stats *stats = &priv->ndev->stats;
1203 if ((priv->regs_status.intf & MCP251XFD_REG_INT_MODIF &&
1204 priv->regs_status.intf & MCP251XFD_REG_INT_IVMIF) ||
1205 priv->regs_status.intf & MCP251XFD_REG_INT_ECCIF ||
1209 if (priv->regs_status.intf & MCP251XFD_REG_INT_ECCIF ||
1215 if (priv->devtype_data.quirks & MCP251XFD_QUIRK_MAB_NO_WARN)
1216 netdev_dbg(priv->ndev, "%s\n", msg);
1218 netdev_info(priv->ndev, "%s\n", msg);
1239 if (priv->regs_status.intf & MCP251XFD_REG_INT_RXOVIF ||
1240 priv->regs_status.intf & MCP251XFD_REG_INT_RXIF) {
1246 netdev_err(priv->ndev,
1248 priv->regs_status.intf);
1254 mcp251xfd_handle_eccif_recover(struct mcp251xfd_priv *priv, u8 nr)
1256 struct mcp251xfd_tx_ring *tx_ring = priv->tx;
1257 struct mcp251xfd_ecc *ecc = &priv->ecc;
1265 err = mcp251xfd_tx_tail_get_from_chip(priv, &chip_tx_tail);
1278 !(offset == 0 || (offset == 1 && (mcp251xfd_is_2518FD(priv) ||
1279 mcp251xfd_is_251863(priv))))) {
1280 netdev_err(priv->ndev,
1287 netdev_info(priv->ndev,
1295 err = spi_sync_transfer(priv->spi, tx_obj->xfer, 1);
1300 return mcp251xfd_chip_set_normal_mode(priv);
1304 mcp251xfd_handle_eccif(struct mcp251xfd_priv *priv, bool set_normal_mode)
1306 struct mcp251xfd_ecc *ecc = &priv->ecc;
1314 err = regmap_read(priv->map_reg, MCP251XFD_REG_ECCSTAT, &ecc_stat);
1318 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_ECCSTAT,
1325 err = mcp251xfd_get_tx_nr_by_addr(priv->tx, &nr, addr);
1355 netdev_notice(priv->ndev, "%s 0x%04x.\n", msg, addr);
1365 netdev_info(priv->ndev,
1370 return mcp251xfd_handle_eccif_recover(priv, nr);
1374 return mcp251xfd_chip_set_normal_mode_nowait(priv);
1379 static int mcp251xfd_handle_spicrcif(struct mcp251xfd_priv *priv)
1384 err = regmap_read(priv->map_reg, MCP251XFD_REG_CRC, &crc);
1388 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_CRC,
1395 netdev_notice(priv->ndev, "CRC write command format error.\n");
1397 netdev_notice(priv->ndev,
1404 static int mcp251xfd_read_regs_status(struct mcp251xfd_priv *priv)
1406 const int val_bytes = regmap_get_val_bytes(priv->map_reg);
1409 if (priv->rx_ring_num == 1)
1410 len = sizeof(priv->regs_status.intf);
1412 len = sizeof(priv->regs_status);
1414 return regmap_bulk_read(priv->map_reg, MCP251XFD_REG_INT,
1415 &priv->regs_status, len / val_bytes);
1418 #define mcp251xfd_handle(priv, irq, ...) \
1420 struct mcp251xfd_priv *_priv = (priv); \
1433 struct mcp251xfd_priv *priv = dev_id;
1437 if (priv->rx_int)
1441 rx_pending = gpiod_get_value_cansleep(priv->rx_int);
1449 priv->regs_status.rxif = BIT(priv->rx[0]->fifo_nr);
1450 err = mcp251xfd_handle(priv, rxif);
1460 } while (priv->rx_ring_num == 1);
1466 err = mcp251xfd_read_regs_status(priv);
1471 priv->regs_status.intf) &
1473 priv->regs_status.intf);
1476 can_rx_offload_threaded_irq_finish(&priv->offload);
1491 err = regmap_update_bits(priv->map_reg,
1500 err = mcp251xfd_handle(priv, modif, &set_normal_mode);
1506 err = mcp251xfd_handle(priv, rxif);
1512 err = mcp251xfd_handle(priv, tefif);
1518 err = mcp251xfd_handle(priv, rxovif);
1524 err = mcp251xfd_handle(priv, txatif);
1530 err = mcp251xfd_handle(priv, ivmif);
1536 err = mcp251xfd_handle(priv, serrif);
1542 err = mcp251xfd_handle(priv, eccif, set_normal_mode);
1548 err = mcp251xfd_handle(priv, spicrcif);
1558 priv->can.state > CAN_STATE_ERROR_ACTIVE) {
1559 err = mcp251xfd_handle(priv, cerrif);
1570 if (priv->can.state == CAN_STATE_BUS_OFF) {
1571 can_rx_offload_threaded_irq_finish(&priv->offload);
1580 can_rx_offload_threaded_irq_finish(&priv->offload);
1582 netdev_err(priv->ndev, "IRQ handler returned %d (intf=0x%08x).\n",
1583 err, priv->regs_status.intf);
1584 mcp251xfd_dump(priv);
1585 mcp251xfd_chip_interrupts_disable(priv);
1586 mcp251xfd_timestamp_stop(priv);
1593 struct mcp251xfd_priv *priv = netdev_priv(ndev);
1594 const struct spi_device *spi = priv->spi;
1605 err = mcp251xfd_ring_alloc(priv);
1609 err = mcp251xfd_transceiver_enable(priv);
1613 err = mcp251xfd_chip_start(priv);
1617 mcp251xfd_timestamp_init(priv);
1618 clear_bit(MCP251XFD_FLAGS_DOWN, priv->flags);
1619 can_rx_offload_enable(&priv->offload);
1623 dev_name(&spi->dev), priv);
1627 err = mcp251xfd_chip_interrupts_enable(priv);
1636 free_irq(spi->irq, priv);
1638 can_rx_offload_disable(&priv->offload);
1639 set_bit(MCP251XFD_FLAGS_DOWN, priv->flags);
1640 mcp251xfd_timestamp_stop(priv);
1642 mcp251xfd_transceiver_disable(priv);
1644 mcp251xfd_ring_free(priv);
1646 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
1656 struct mcp251xfd_priv *priv = netdev_priv(ndev);
1659 set_bit(MCP251XFD_FLAGS_DOWN, priv->flags);
1660 hrtimer_cancel(&priv->rx_irq_timer);
1661 hrtimer_cancel(&priv->tx_irq_timer);
1662 mcp251xfd_chip_interrupts_disable(priv);
1663 free_irq(ndev->irq, priv);
1664 can_rx_offload_disable(&priv->offload);
1665 mcp251xfd_timestamp_stop(priv);
1666 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
1667 mcp251xfd_transceiver_disable(priv);
1668 mcp251xfd_ring_free(priv);
1685 mcp251xfd_register_quirks(struct mcp251xfd_priv *priv)
1687 const struct spi_device *spi = priv->spi;
1691 priv->devtype_data.quirks |= MCP251XFD_QUIRK_HALF_DUPLEX;
1694 static int mcp251xfd_register_chip_detect(struct mcp251xfd_priv *priv)
1696 const struct net_device *ndev = priv->ndev;
1704 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_OSC,
1710 err = regmap_read(priv->map_reg, MCP251XFD_REG_OSC, &osc);
1719 if (mcp251xfd_is_251863(priv))
1727 if (!mcp251xfd_is_251XFD(priv) &&
1728 priv->devtype_data.model != devtype_data->model) {
1732 mcp251xfd_get_model_str(priv));
1734 priv->devtype_data = *devtype_data;
1737 mcp251xfd_register_quirks(priv);
1740 return mcp251xfd_regmap_init(priv);
1743 static int mcp251xfd_register_check_rx_int(struct mcp251xfd_priv *priv)
1747 if (!priv->rx_int)
1750 err = mcp251xfd_chip_rx_int_enable(priv);
1757 rx_pending = gpiod_get_value_cansleep(priv->rx_int);
1759 err = mcp251xfd_chip_rx_int_disable(priv);
1766 netdev_info(priv->ndev,
1768 devm_gpiod_put(&priv->spi->dev, priv->rx_int);
1769 priv->rx_int = NULL;
1775 mcp251xfd_register_get_dev_id(const struct mcp251xfd_priv *priv, u32 *dev_id,
1796 xfer[0].speed_hz = priv->spi_max_speed_hz_slow;
1799 xfer[1].speed_hz = priv->spi_max_speed_hz_fast;
1803 err = spi_sync_transfer(priv->spi, xfer, ARRAY_SIZE(xfer));
1820 (priv->devtype_data.quirks & MCP251XFD_QUIRK_##quirk ? '+' : '-')
1823 mcp251xfd_register_done(const struct mcp251xfd_priv *priv)
1829 err = mcp251xfd_register_get_dev_id(priv, &dev_id,
1835 clk_rate = clk_get_rate(priv->clk);
1837 netdev_info(priv->ndev,
1839 mcp251xfd_get_model_str(priv),
1842 priv->rx_int ? '+' : '-',
1843 priv->pll_enable ? '+' : '-',
1852 priv->can.clock.freq / 1000000,
1853 priv->can.clock.freq % 1000000 / 1000 / 10,
1854 priv->spi_max_speed_hz_orig / 1000000,
1855 priv->spi_max_speed_hz_orig % 1000000 / 1000 / 10,
1856 priv->spi_max_speed_hz_slow / 1000000,
1857 priv->spi_max_speed_hz_slow % 1000000 / 1000 / 10,
1860 priv->spi_max_speed_hz_fast / 1000000,
1861 priv->spi_max_speed_hz_fast % 1000000 / 1000 / 10,
1868 static int mcp251xfd_register(struct mcp251xfd_priv *priv)
1870 struct net_device *ndev = priv->ndev;
1873 err = mcp251xfd_clks_and_vdd_enable(priv);
1883 mcp251xfd_register_quirks(priv);
1885 err = mcp251xfd_chip_softreset(priv);
1891 err = mcp251xfd_chip_clock_init(priv);
1897 err = mcp251xfd_register_chip_detect(priv);
1901 err = mcp251xfd_register_check_rx_int(priv);
1905 mcp251xfd_ethtool_init(priv);
1911 err = mcp251xfd_register_done(priv);
1919 err = mcp251xfd_chip_sleep(priv);
1930 mcp251xfd_chip_sleep(priv);
1935 mcp251xfd_clks_and_vdd_disable(priv);
1940 static inline void mcp251xfd_unregister(struct mcp251xfd_priv *priv)
1942 struct net_device *ndev = priv->ndev;
1949 mcp251xfd_clks_and_vdd_disable(priv);
1994 struct mcp251xfd_priv *priv;
2063 priv = netdev_priv(ndev);
2064 spi_set_drvdata(spi, priv);
2065 priv->can.clock.freq = freq;
2067 priv->can.clock.freq *= MCP251XFD_OSC_PLL_MULTIPLIER;
2068 priv->can.do_set_mode = mcp251xfd_set_mode;
2069 priv->can.do_get_berr_counter = mcp251xfd_get_berr_counter;
2070 priv->can.bittiming_const = &mcp251xfd_bittiming_const;
2071 priv->can.data_bittiming_const = &mcp251xfd_data_bittiming_const;
2072 priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
2076 set_bit(MCP251XFD_FLAGS_DOWN, priv->flags);
2077 priv->ndev = ndev;
2078 priv->spi = spi;
2079 priv->rx_int = rx_int;
2080 priv->clk = clk;
2081 priv->pll_enable = pll_enable;
2082 priv->reg_vdd = reg_vdd;
2083 priv->reg_xceiver = reg_xceiver;
2087 priv->devtype_data = *(struct mcp251xfd_devtype_data *)match;
2089 priv->devtype_data = *(struct mcp251xfd_devtype_data *)
2118 priv->spi_max_speed_hz_orig = spi->max_speed_hz;
2119 priv->spi_max_speed_hz_slow = min(spi->max_speed_hz,
2121 if (priv->pll_enable)
2122 priv->spi_max_speed_hz_fast = min(spi->max_speed_hz,
2127 priv->spi_max_speed_hz_fast = priv->spi_max_speed_hz_slow;
2128 spi->max_speed_hz = priv->spi_max_speed_hz_slow;
2135 err = mcp251xfd_regmap_init(priv);
2139 err = can_rx_offload_add_manual(ndev, &priv->offload,
2144 err = mcp251xfd_register(priv);
2147 mcp251xfd_get_model_str(priv));
2154 can_rx_offload_del(&priv->offload);
2156 spi->max_speed_hz = priv->spi_max_speed_hz_orig;
2165 struct mcp251xfd_priv *priv = spi_get_drvdata(spi);
2166 struct net_device *ndev = priv->ndev;
2168 can_rx_offload_del(&priv->offload);
2169 mcp251xfd_unregister(priv);
2170 spi->max_speed_hz = priv->spi_max_speed_hz_orig;
2176 const struct mcp251xfd_priv *priv = dev_get_drvdata(device);
2178 return mcp251xfd_clks_and_vdd_disable(priv);
2183 const struct mcp251xfd_priv *priv = dev_get_drvdata(device);
2185 return mcp251xfd_clks_and_vdd_enable(priv);