can/m_can/m_can.c

358 	u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE +
1420 			    cdev->mcfg[MRAM_TXB].off);
1425 				       cdev->mcfg[MRAM_TXB].num) |
1426 			    cdev->mcfg[MRAM_TXB].off);
2086 	if (ec->tx_max_coalesced_frames_irq > cdev->mcfg[MRAM_TXB].num) {
2089 			   cdev->mcfg[MRAM_TXB].num);
2102 	if (ec->tx_max_coalesced_frames > cdev->mcfg[MRAM_TXB].num) {
2105 			   cdev->mcfg[MRAM_TXB].num);
2163 	total_size = cdev->mcfg[MRAM_TXB].off - cdev->mcfg[MRAM_SIDF].off +
2164 			cdev->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;
2197 	cdev->mcfg[MRAM_TXB].off = cdev->mcfg[MRAM_TXE].off +
2199 	cdev->mcfg[MRAM_TXB].num = mram_config_vals[7] &
2210 		cdev->mcfg[MRAM_TXB].off, cdev->mcfg[MRAM_TXB].num);
2222 	end = cdev->mcfg[MRAM_TXB].off +
2223 		cdev->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;
2302 	cdev->tx_fifo_size = max(1, min(cdev->mcfg[MRAM_TXB].num,