net/can/kvaser_pciefd.c

512 	iowrite32(FIELD_PREP(KVASER_PCIEFD_KCAN_CMD_MASK, cmd) |
536 		iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG);
549 	iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG);
563 	iowrite32(msk, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
600 	iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG);
611 	iowrite32(GENMASK(31, 0), can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);
612 	iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,
624 		iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG);
645 	iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
646 	iowrite32(GENMASK(31, 0), can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);
647 	iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,
651 	iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG);
660 	iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
661 	iowrite32(GENMASK(31, 0), can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);
685 	iowrite32(pwm_ctrl, can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG);
702 	iowrite32(pwm_ctrl, can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG);
708 	iowrite32(pwm_ctrl, can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG);
744 		iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
818 	iowrite32(packet.header[0],
820 	iowrite32(packet.header[1],
871 	iowrite32(mode | KVASER_PCIEFD_KCAN_MODE_RM,
883 		iowrite32(btrn, can->reg_base + KVASER_PCIEFD_KCAN_BTRD_REG);
885 		iowrite32(btrn, can->reg_base + KVASER_PCIEFD_KCAN_BTRN_REG);
887 	iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG);
981 		iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_BUS_LOAD_REG);
1019 		iowrite32(GENMASK(31, 0), can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);
1020 		iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,
1064 	iowrite32(word1, serdes_base);
1065 	iowrite32(word2, serdes_base + 0x4);
1079 	iowrite32(lsb, serdes_base);
1080 	iowrite32(msb, serdes_base + 0x4);
1094 	iowrite32(msb, serdes_base);
1095 	iowrite32(lsb, serdes_base + 0x4);
1106 	iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG);
1122 	iowrite32(KVASER_PCIEFD_SRB_CMD_FOR | KVASER_PCIEFD_SRB_CMD_RDB0 |
1143 	iowrite32(KVASER_PCIEFD_SRB_CTRL_DMA_ENABLE,
1175 	iowrite32(0, KVASER_PCIEFD_LOOPBACK_ADDR(pcie));
1423 		iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,
1436 			iowrite32(FIELD_PREP(KVASER_PCIEFD_KCAN_CTRL_TYPE_MASK,
1650 		iowrite32(KVASER_PCIEFD_SRB_CMD_RDB0,
1657 		iowrite32(KVASER_PCIEFD_SRB_CMD_RDB1,
1667 	iowrite32(irq, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);
1687 	iowrite32(irq, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);
1726 			iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
1783 	iowrite32(KVASER_PCIEFD_SRB_IRQ_DPD0 | KVASER_PCIEFD_SRB_IRQ_DPD1,
1786 	iowrite32(KVASER_PCIEFD_SRB_IRQ_DPD0 | KVASER_PCIEFD_SRB_IRQ_DPD1 |
1793 	iowrite32(irq_mask->all, irq_en_base);
1795 	iowrite32(KVASER_PCIEFD_SRB_CMD_RDB0,
1797 	iowrite32(KVASER_PCIEFD_SRB_CMD_RDB1,
1808 	iowrite32(0, irq_en_base);
1813 	iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG);
1836 			iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG);
1852 	iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG);
1853 	iowrite32(0, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));