can/flexcan/flexcan-core.c

426  * PPC cores. So, we need to abstract off the register read/write
509 	priv->write(reg_mcr, &regs->mcr);
537 	priv->write(reg_mcr, &regs->mcr);
570 	priv->write(reg_mcr, &regs->mcr);
580 	priv->write(reg_ctrl, &regs->ctrl);
588 	priv->write(reg_ctrl, &regs->ctrl);
639 	priv->write(reg, &regs->mcr);
651 	priv->write(reg, &regs->mcr);
670 	priv->write(reg, &regs->mcr);
689 	priv->write(reg, &regs->mcr);
705 	priv->write(FLEXCAN_MCR_SOFTRST, &regs->mcr);
778 		priv->write(data, &priv->tx_mb->data[i / sizeof(u32)]);
783 	priv->write(can_id, &priv->tx_mb->can_id);
784 	priv->write(ctrl, &priv->tx_mb->can_ctrl);
789 	priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
791 	priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
921 		priv->write(upper_32_bits(val), addr - 4);
923 		priv->write(lower_32_bits(val), addr);
1028 		priv->write(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, &regs->iflag1);
1074 			priv->write(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW,
1094 		priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
1105 		priv->write(reg_esr & (FLEXCAN_ESR_ALL_INT | FLEXCAN_ESR_WAK_INT), &regs->esr);
1184 	priv->write(reg, &regs->ctrl);
1219 	priv->write(reg_cbt, &regs->cbt);
1255 		priv->write(reg_fdcbt, &regs->fdcbt);
1264 		priv->write(reg_ctrl2, &regs->ctrl2);
1288 	priv->write(reg_fdctrl, &regs->fdctrl);
1315 	priv->write(reg, &regs->ctrl);
1330 	 * CTRL2[WRMFRZ] grants write access to all memory positions
1339 	priv->write(reg_ctrl2, &regs->ctrl2);
1347 	priv->write(reg_ctrl2, &regs->ctrl2);
1402 	priv->write(priv->reg_ctrl_default, &regs->ctrl);
1404 	priv->write(upper_32_bits(reg_imask), &regs->imask2);
1405 	priv->write(lower_32_bits(reg_imask), &regs->imask1);
1414 	priv->write(0, &regs->imask2);
1415 	priv->write(0, &regs->imask1);
1416 	priv->write(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL,
1501 	priv->write(reg_mcr, &regs->mcr);
1534 	priv->write(reg_ctrl, &regs->ctrl);
1539 		priv->write(reg_ctrl2, &regs->ctrl2);
1565 		priv->write(reg_fdctrl, &regs->fdctrl);
1571 			priv->write(FLEXCAN_MB_CODE_RX_EMPTY,
1578 			priv->write(FLEXCAN_MB_CODE_RX_INACTIVE,
1584 	priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
1588 	priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
1592 	priv->write(0x0, &regs->rxgmask);
1593 	priv->write(0x0, &regs->rx14mask);
1594 	priv->write(0x0, &regs->rx15mask);
1597 		priv->write(0x0, &regs->rxfgmask);
1601 		priv->write(0, &regs->rximr[i]);
1612 		 * and Correction of Memory Errors" to write to
1620 		priv->write(reg_ctrl2, &regs->ctrl2);
1625 		priv->write(reg_mecr, &regs->mecr);
1630 		priv->write(reg_mecr, &regs->mecr);
1636 		priv->write(reg_mecr, &regs->mecr);
1639 		priv->write(reg_ctrl2, &regs->ctrl2);
1845 	priv->write(reg, &regs->ctrl);
1859 	priv->write(reg, &regs->mcr);
2135 		priv->write = flexcan_write_be;
2138 		priv->write = flexcan_write_le;