mtd/spi-nor/micron-st.c

7 #include <linux/mtd/spi-nor.h>
51 static int micron_st_nor_octal_dtr_en(struct spi_nor *nor)
54 	u8 *buf = nor->bouncebuf;
56 	u8 addr_mode_nbytes = nor->params->addr_mode_nbytes;
63 	ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
71 	ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
76 	ret = spi_nor_read_id(nor, 0, 8, buf, SNOR_PROTO_8_8_8_DTR);
78 		dev_dbg(nor->dev, "error %d reading JEDEC ID after enabling 8D-8D-8D mode\n", ret);
82 	if (memcmp(buf, nor->info->id->bytes, nor->info->id->len))
88 static int micron_st_nor_octal_dtr_dis(struct spi_nor *nor)
91 	u8 *buf = nor->bouncebuf;
105 		MICRON_ST_NOR_WR_ANY_REG_OP(nor->addr_nbytes,
107 	ret = spi_nor_write_any_volatile_reg(nor, &op, SNOR_PROTO_8_8_8_DTR);
112 	ret = spi_nor_read_id(nor, 0, 0, buf, SNOR_PROTO_1_1_1);
114 		dev_dbg(nor->dev, "error %d reading JEDEC ID after disabling 8D-8D-8D mode\n", ret);
118 	if (memcmp(buf, nor->info->id->bytes, nor->info->id->len))
124 static int micron_st_nor_set_octal_dtr(struct spi_nor *nor, bool enable)
126 	return enable ? micron_st_nor_octal_dtr_en(nor) :
127 			micron_st_nor_octal_dtr_dis(nor);
130 static void mt35xu512aba_default_init(struct spi_nor *nor)
132 	nor->params->set_octal_dtr = micron_st_nor_set_octal_dtr;
135 static int mt35xu512aba_post_sfdp_fixup(struct spi_nor *nor)
138 	nor->params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
139 	spi_nor_set_read_settings(&nor->params->reads[SNOR_CMD_READ_8_8_8_DTR],
143 	nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
144 	nor->params->rdsr_dummy = 8;
145 	nor->params->rdsr_addr_nbytes = 0;
152 	nor->params->quad_enable = NULL;
184 static int mt25qu512a_post_bfpt_fixup(struct spi_nor *nor,
188 	nor->flags &= ~SNOR_F_HAS_16BIT_SR;
196 static int st_nor_four_die_late_init(struct spi_nor *nor)
198 	struct spi_nor_flash_parameter *params = nor->params;
209 	return spi_nor_set_4byte_addr_mode(nor, true);
212 static int st_nor_two_die_late_init(struct spi_nor *nor)
214 	struct spi_nor_flash_parameter *params = nor->params;
225 	return spi_nor_set_4byte_addr_mode(nor, true);
502  * @nor:	pointer to 'struct spi_nor'
509 static int micron_st_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
513 	if (nor->spimem) {
516 		if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
517 			op.addr.nbytes = nor->params->rdsr_addr_nbytes;
518 			op.dummy.nbytes = nor->params->rdsr_dummy;
526 		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
528 		ret = spi_mem_exec_op(nor->spimem, &op);
530 		ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr,
535 		dev_dbg(nor->dev, "error %d reading FSR\n", ret);
542  * @nor:	pointer to 'struct spi_nor'.
544 static void micron_st_nor_clear_fsr(struct spi_nor *nor)
548 	if (nor->spimem) {
551 		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
553 		ret = spi_mem_exec_op(nor->spimem, &op);
555 		ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR,
560 		dev_dbg(nor->dev, "error %d clearing FSR\n", ret);
567  * @nor:	pointer to 'struct spi_nor'.
571 static int micron_st_nor_ready(struct spi_nor *nor)
575 	sr_ready = spi_nor_sr_ready(nor);
579 	ret = micron_st_nor_read_fsr(nor, nor->bouncebuf);
591 	if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) {
592 		if (nor->bouncebuf[0] & FSR_E_ERR)
593 			dev_err(nor->dev, "Erase operation failed.\n");
595 			dev_err(nor->dev, "Program operation failed.\n");
597 		if (nor->bouncebuf[0] & FSR_PT_ERR)
598 			dev_err(nor->dev,
601 		micron_st_nor_clear_fsr(nor);
609 		ret = spi_nor_write_disable(nor);
616 	return sr_ready && !!(nor->bouncebuf[0] & FSR_READY);
619 static void micron_st_nor_default_init(struct spi_nor *nor)
621 	nor->flags |= SNOR_F_HAS_LOCK;
622 	nor->flags &= ~SNOR_F_HAS_16BIT_SR;
623 	nor->params->quad_enable = NULL;
626 static int micron_st_nor_late_init(struct spi_nor *nor)
628 	struct spi_nor_flash_parameter *params = nor->params;
630 	if (nor->info->mfr_flags & USE_FSR)