nand/raw/mpc5121_nfc.c

125 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
127 	return in_be16(prv->regs + reg);
134 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
136 	out_be16(prv->regs + reg, val);
204 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
207 	wake_up(&prv->irq_waitq);
216 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
221 		rv = wait_event_timeout(prv->irq_waitq,
225 			dev_warn(prv->dev,
273 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
278 		prv->csreg = of_iomap(dn, 0);
280 		if (!prv->csreg)
284 		prv->csreg += 9;
294 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand);
297 	v = in_8(prv->csreg);
306 	out_8(prv->csreg, v);
324 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
326 	prv->column = (column >= 0) ? column : 0;
327 	prv->spareonly = 0;
342 		prv->column += 256;
348 		prv->spareonly = 1;
385 			prv->column = 1;
387 			prv->column = 0;
397 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand);
432 			memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o,
436 				prv->regs + NFC_SPARE_AREA(s) + o, blksize);
449 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
450 	uint c = prv->column;
454 	if (prv->spareonly || c >= mtd->writesize) {
459 		prv->column += len;
469 	prv->column += l;
472 		memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l);
474 		memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l);
517 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
529 		dev_err(prv->dev, "Missing 'fsl,mpc5121-reset' "
536 		dev_err(prv->dev, "Error mapping reset module node!\n");
581 	dev_notice(prv->dev, "Configured for "
596 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
598 	if (prv->csreg)
599 		iounmap(prv->csreg);
620 	struct mpc5121_nfc_prv *prv;
640 	prv = devm_kzalloc(dev, sizeof(*prv), GFP_KERNEL);
641 	if (!prv)
644 	chip = &prv->chip;
647 	nand_controller_init(&prv->controller);
648 	prv->controller.ops = &mpc5121_nfc_ops;
649 	chip->controller = &prv->controller;
652 	nand_set_controller_data(chip, prv);
654 	prv->dev = dev;
663 	prv->irq = irq_of_parse_and_map(dn, 0);
664 	if (!prv->irq) {
689 	prv->regs = devm_ioremap(dev, regs_paddr, regs_size);
690 	if (!prv->regs) {
724 	prv->clk = clk;
757 	init_waitqueue_head(&prv->irq_waitq);
758 	retval = devm_request_irq(dev, prv->irq, &mpc5121_nfc_irq, 0, DRV_NAME,