nand/raw/gpio.c

30 struct gpiomtd {
43 static inline struct gpiomtd *gpio_nand_getpriv(struct mtd_info *mtd)
45 	return container_of(mtd_to_nand(mtd), struct gpiomtd, nand_chip);
57 static void gpio_nand_dosync(struct gpiomtd *gpiomtd)
61 	if (gpiomtd->io_sync) {
67 		tmp = readl(gpiomtd->io_sync);
72 static inline void gpio_nand_dosync(struct gpiomtd *gpiomtd) {}
78 	struct gpiomtd *gpiomtd = gpio_nand_getpriv(nand_to_mtd(chip));
83 		gpio_nand_dosync(gpiomtd);
84 		gpiod_set_value(gpiomtd->cle, 1);
85 		gpio_nand_dosync(gpiomtd);
86 		writeb(instr->ctx.cmd.opcode, gpiomtd->io);
87 		gpio_nand_dosync(gpiomtd);
88 		gpiod_set_value(gpiomtd->cle, 0);
92 		gpio_nand_dosync(gpiomtd);
93 		gpiod_set_value(gpiomtd->ale, 1);
94 		gpio_nand_dosync(gpiomtd);
96 			writeb(instr->ctx.addr.addrs[i], gpiomtd->io);
97 		gpio_nand_dosync(gpiomtd);
98 		gpiod_set_value(gpiomtd->ale, 0);
102 		gpio_nand_dosync(gpiomtd);
105 			ioread16_rep(gpiomtd->io, instr->ctx.data.buf.in,
108 			ioread8_rep(gpiomtd->io, instr->ctx.data.buf.in,
113 		gpio_nand_dosync(gpiomtd);
116 			iowrite16_rep(gpiomtd->io, instr->ctx.data.buf.out,
119 			iowrite8_rep(gpiomtd->io, instr->ctx.data.buf.out,
124 		if (!gpiomtd->rdy)
127 		return nand_gpio_waitrdy(chip, gpiomtd->rdy,
141 	struct gpiomtd *gpiomtd = gpio_nand_getpriv(nand_to_mtd(chip));
148 	gpio_nand_dosync(gpiomtd);
149 	gpiod_set_value(gpiomtd->nce, 0);
158 	gpio_nand_dosync(gpiomtd);
159 	gpiod_set_value(gpiomtd->nce, 1);
270 	struct gpiomtd *gpiomtd = platform_get_drvdata(pdev);
271 	struct nand_chip *chip = &gpiomtd->nand_chip;
279 	if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
280 		gpiod_set_value(gpiomtd->nwp, 0);
281 	if (gpiomtd->nce && !IS_ERR(gpiomtd->nce))
282 		gpiod_set_value(gpiomtd->nce, 0);
287 	struct gpiomtd *gpiomtd;
297 	gpiomtd = devm_kzalloc(dev, sizeof(*gpiomtd), GFP_KERNEL);
298 	if (!gpiomtd)
301 	chip = &gpiomtd->nand_chip;
303 	gpiomtd->io = devm_platform_ioremap_resource(pdev, 0);
304 	if (IS_ERR(gpiomtd->io))
305 		return PTR_ERR(gpiomtd->io);
309 		gpiomtd->io_sync = devm_ioremap_resource(dev, res);
310 		if (IS_ERR(gpiomtd->io_sync))
311 			return PTR_ERR(gpiomtd->io_sync);
314 	ret = gpio_nand_get_config(dev, &gpiomtd->plat);
319 	gpiomtd->nce = devm_gpiod_get_optional(dev, "nce", GPIOD_OUT_HIGH);
320 	if (IS_ERR(gpiomtd->nce))
321 		return PTR_ERR(gpiomtd->nce);
324 	gpiomtd->nwp = devm_gpiod_get_optional(dev, "nwp", GPIOD_OUT_LOW);
325 	if (IS_ERR(gpiomtd->nwp)) {
326 		ret = PTR_ERR(gpiomtd->nwp);
330 	gpiomtd->ale = devm_gpiod_get(dev, "ale", GPIOD_OUT_LOW);
331 	if (IS_ERR(gpiomtd->ale)) {
332 		ret = PTR_ERR(gpiomtd->ale);
336 	gpiomtd->cle = devm_gpiod_get(dev, "cle", GPIOD_OUT_LOW);
337 	if (IS_ERR(gpiomtd->cle)) {
338 		ret = PTR_ERR(gpiomtd->cle);
342 	gpiomtd->rdy = devm_gpiod_get_optional(dev, "rdy", GPIOD_IN);
343 	if (IS_ERR(gpiomtd->rdy)) {
344 		ret = PTR_ERR(gpiomtd->rdy);
348 	nand_controller_init(&gpiomtd->base);
349 	gpiomtd->base.ops = &gpio_nand_ops;
352 	chip->options		= gpiomtd->plat.options;
353 	chip->controller	= &gpiomtd->base;
358 	platform_set_drvdata(pdev, gpiomtd);
361 	if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
362 		gpiod_direction_output(gpiomtd->nwp, 1);
375 	if (gpiomtd->plat.adjust_parts)
376 		gpiomtd->plat.adjust_parts(&gpiomtd->plat, mtd->size);
378 	ret = mtd_device_register(mtd, gpiomtd->plat.parts,
379 				  gpiomtd->plat.num_parts);
384 	if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
385 		gpiod_set_value(gpiomtd->nwp, 0);
387 	if (gpiomtd->nce && !IS_ERR(gpiomtd->nce))
388 		gpiod_set_value(gpiomtd->nce, 0);