Lines Matching defs:tap
335 static void tegra_sdhci_set_tap(struct sdhci_host *host, unsigned int tap)
344 * Touching the tap values is a bit tricky on some SoC generations.
346 * the tap values are changed.
354 reg |= tap << SDHCI_CLOCK_CTRL_TAP_SHIFT;
718 err = device_property_read_u32(mmc_dev(host->mmc), "nvidia,default-tap",
859 u8 word, bit, edge1, tap, window;
884 tap = word * TUNING_WORD_BIT_SIZE + bit;
889 first_fail_tap = tap;
894 start_pass_tap = tap;
897 first_pass_tap = tap;
903 end_pass_tap = tap - 1;
910 start_pass_tap = tap;
913 /* set tap at middle of valid window */
914 tap = start_pass_tap + window / 2;
915 tegra_host->tuned_tap_delay = tap;
927 /* set tap location at fixed tap relative to the first edge */
947 /* retain HW tuned tap to use incase if no correction is needed */
965 * fixed tap is used when HW tuning result contains single edge
966 * and tap is set at fixed tap delay relative to the first edge
1023 /* Don't set default tap on tunable modes. */
1074 * Start search for minimum tap value at 10, as smaller values are
1086 /* Find the maximum tap value that still passes. */
1097 /* The TRM states the ideal tap value is at 75% in the passing range. */