mmc/host/sdhci-of-aspeed-test.c

8 	int rate = 52000000;
11 			aspeed_sdhci_phase_to_tap(NULL, rate, 0));
13 			aspeed_sdhci_phase_to_tap(NULL, rate, 1));
15 			aspeed_sdhci_phase_to_tap(NULL, rate, 2));
17 			aspeed_sdhci_phase_to_tap(NULL, rate, 3));
19 			aspeed_sdhci_phase_to_tap(NULL, rate, 4));
21 			aspeed_sdhci_phase_to_tap(NULL, rate, 5));
23 			aspeed_sdhci_phase_to_tap(NULL, rate, 23));
25 			aspeed_sdhci_phase_to_tap(NULL, rate, 24));
27 			aspeed_sdhci_phase_to_tap(NULL, rate, 25));
30 			aspeed_sdhci_phase_to_tap(NULL, rate, 180));
32 			aspeed_sdhci_phase_to_tap(NULL, rate, 181));
34 			aspeed_sdhci_phase_to_tap(NULL, rate, 182));
36 			aspeed_sdhci_phase_to_tap(NULL, rate, 183));
38 			aspeed_sdhci_phase_to_tap(NULL, rate, 184));
40 			aspeed_sdhci_phase_to_tap(NULL, rate, 185));
42 			aspeed_sdhci_phase_to_tap(NULL, rate, 203));
44 			aspeed_sdhci_phase_to_tap(NULL, rate, 204));
46 			aspeed_sdhci_phase_to_tap(NULL, rate, 205));
51 	int rate = 200000000;
54 			aspeed_sdhci_phase_to_tap(NULL, rate, 0));
56 			aspeed_sdhci_phase_to_tap(NULL, rate, 5));
58 			aspeed_sdhci_phase_to_tap(NULL, rate, 6));
60 			aspeed_sdhci_phase_to_tap(NULL, rate, 7));
62 			aspeed_sdhci_phase_to_tap(NULL, rate, 89));
64 			aspeed_sdhci_phase_to_tap(NULL, rate, 90));
66 			aspeed_sdhci_phase_to_tap(NULL, rate, 91));
68 			aspeed_sdhci_phase_to_tap(NULL, rate, 96));
71 			aspeed_sdhci_phase_to_tap(NULL, rate, 180));
73 			aspeed_sdhci_phase_to_tap(NULL, rate, 185));
75 			aspeed_sdhci_phase_to_tap(NULL, rate, 186));
77 			aspeed_sdhci_phase_to_tap(NULL, rate, 187));
79 			aspeed_sdhci_phase_to_tap(NULL, rate, 269));
81 			aspeed_sdhci_phase_to_tap(NULL, rate, 270));
83 			aspeed_sdhci_phase_to_tap(NULL, rate, 271));
85 			aspeed_sdhci_phase_to_tap(NULL, rate, 276));