Lines Matching defs:host

60 static void sdhci_milbeaut_soft_voltage_switch(struct sdhci_host *host)
65 ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
67 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
69 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
72 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
75 ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
77 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
80 static unsigned int sdhci_milbeaut_get_min_clock(struct sdhci_host *host)
85 static void sdhci_milbeaut_reset(struct sdhci_host *host, u8 mask)
87 struct f_sdhost_priv *priv = sdhci_priv(host);
92 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
96 sdhci_reset(host, mask);
99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
105 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
110 mmc_hostname(host->mmc));
111 sdhci_dumpregs(host);
118 ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
120 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
134 static void sdhci_milbeaut_bridge_reset(struct sdhci_host *host,
138 sdhci_writel(host, 0, MLB_SOFT_RESET);
140 sdhci_writel(host, MLB_SOFT_RESET_RSTX, MLB_SOFT_RESET);
143 static void sdhci_milbeaut_bridge_init(struct sdhci_host *host,
149 val = sdhci_readl(host, MLB_CR_SET);
169 sdhci_writel(host, val, MLB_CR_SET);
171 sdhci_writel(host, MLB_CDR_SET_CLK2POW16, MLB_CDR_SET);
173 sdhci_writel(host, MLB_WP_CD_LED_SET_LED_INV, MLB_WP_CD_LED_SET);
176 static void sdhci_milbeaut_vendor_init(struct sdhci_host *host)
178 struct f_sdhost_priv *priv = sdhci_priv(host);
181 ctl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
183 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2);
185 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2);
187 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2);
189 ctl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
193 sdhci_writew(host, ctl, F_SDH30_AHB_CONFIG);
196 ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
198 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
210 static void sdhci_milbeaut_init(struct sdhci_host *host)
212 struct f_sdhost_priv *priv = sdhci_priv(host);
216 sdhci_milbeaut_bridge_reset(host, 0);
218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL);
222 sdhci_milbeaut_bridge_reset(host, 1);
224 sdhci_milbeaut_bridge_init(host, rate);
225 sdhci_milbeaut_bridge_reset(host, 0);
227 sdhci_milbeaut_vendor_init(host);
232 struct sdhci_host *host;
241 host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv));
242 if (IS_ERR(host))
243 return PTR_ERR(host);
245 priv = sdhci_priv(host);
248 host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
252 host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE |
259 ret = mmc_of_parse(host->mmc);
263 platform_set_drvdata(pdev, host);
265 host->hw_name = "f_sdh30";
266 host->ops = &sdhci_milbeaut_ops;
267 host->irq = irq;
269 host->ioaddr = devm_platform_ioremap_resource(pdev, 0);
270 if (IS_ERR(host->ioaddr)) {
271 ret = PTR_ERR(host->ioaddr);
299 sdhci_milbeaut_init(host);
301 ret = sdhci_add_host(host);
312 sdhci_free_host(host);
318 struct sdhci_host *host = platform_get_drvdata(pdev);
319 struct f_sdhost_priv *priv = sdhci_priv(host);
321 sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
327 sdhci_free_host(host);